[OpenPower-Firmware] LPC Address space questions

[Daniel M Crowell]

If we move the map, everything moves, including the xscom base addresses.
The xscom BAR is setup by the SBE, it isn't changed dynamically with host
code once it is established.

--
Dan Crowell
Senior Software Engineer - Power Systems Enablement Firmware
IBM Rochester: t/l 553-2987
dcrowell at us.ibm.com



From:	"Marty E. Plummer" <hanetzer at startmail.com>
To:	Daniel M Crowell <dcrowell at us.ibm.com>
Cc:	openpower-firmware at lists.ozlabs.org
Date:	10/15/2020 09:52 AM
Subject:	[EXTERNAL] Re: [OpenPower-Firmware] LPC Address space questions



On Sun, Oct 11, 2020 at 01:24:05AM +0000, Daniel M Crowell wrote:
>> On Fri, Oct 09, 2020 at 01:44:34AM +0000, Daniel M Crowell wrote:
>>>> What would a situation 'no functional memory behind proc0' look
>>>> like in practice? No dram plugged into the proc0 sockets, or busted
>>>> dram?
>>> Yes, either case could cause it.  Either nothing is installed or we
find errors and
>>> deconfigure/gard what is installed.
>> So, for example's sake (not aware of too many different kinds of p9
>> systems tbh) lets use the Raptor Computing BlackBird as the device in
>> question. One cpu socket, two dram sockets. Assuming 'normal operation',
>> this lpc address space will end up always at the location mentioned
>> earlier, and it only gets complex on multi-cpu systems?
> Correct, this only comes into play on multi-socket systems.
Ok, and one more question in this area. Looking at skiboot's hw/xscom.c,
its all pretty much big endian mmio accesses, but if it were determined
that the address had to be moved (for lack of ram/bad ram/etc), would
that movement be achieved via mmio writes to the address we've
determined to be unsuitable? Same for the xscom base address, I guess.



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