Problems with PCI on 8280
scottwood at freescale.com
Fri Jan 18 10:18:32 EST 2008
Rune Torgersen wrote:
> >From: Scott Wood
> >Are you using cuImage, or a regular uImage with a device-tree-aware u-boot
> cuImage for now.
> >If the former, try commenting out the call to fixup_pci() in
> >arch/powerpc/boot/cuboot-pq2.c and let me know if that changes anything.
> Did that, That made our PCI bus fail completely
Hmm... that suggests that something in u-boot's setup is either
incorrect, or (more likely in this case) doesn't match the device tree.
Or maybe it's the bus parking/arbiter tweaking at the end that u-boot is
> We have our PCI set up to ONE 512MB outbound range doing all three.
> (I can see where you'd save on mem usage by doing two)
> I do see a bug tho.
> In our case prefetch is 256MB, memio is 128MB.
> the calculation for outbound wiondow 1 sets the size to ~(pref+mmio-1).
> That only works if the resulting size is a power of 2.
Ah. Yes, I was assuming both windows would be the same size. The code
should be changed to check that, and if any conditions for setting
PCIBRx/PCIMSKx fail, check to see if the firmware-provided values work
(and if not, bail without touching anything).
> If we comment out the rewrite of the outbound windows, we get PCI to work.
> But since our u-boot sets everything up correctly (Including prefecable
> memory) we should not need this? or is it rewriting the device tree in
> some way?
You shouldn't need it... I'd compare the register values u-boot sets
with the values the corrected fixup_pci() sets (including the soc regs
at the end). Something must be different.
There is no device tree re-writing; it tries to program the hardware to
match what's in the device tree.
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