Problems with PCI on 8280

Rune Torgersen runet at innovsys.com
Fri Jan 18 08:33:13 EST 2008


Hi.
 We have e 8280 bioard with PCI. We have three memory ranges set up;
0x8000_0000 to 0x8fff_ffff is prefetchable memory
0x9000_0000 to 0x97ff_ffff is non-prefetchable memory
0x9800_0000 to 0x9800_ffff is IO.

our device tree has
ranges = <42000000 0 80000000 80000000 0 10000000    // Pre-fetch memory
	  02000000 0 90000000 90000000 0 08000000    // Normal Memory
	  01000000 0 98000000 98000000 0 00010000>;  // I/O

for the memory ranges in the PCI node (full node at the end)

Our problem is that we can only access the first 128MB of the prefetchable area.
an access to 0x87ff_ffff works (after ioremap), while an access to 0x8800_0000 causes an bus error.

trying to access 0x87FFFFFC -> 0x00000000
trying to access 0x88000000 ->Machine check in kernel mode.
Caused by (from SRR1=49030): Transfer error ack signal

It is like the prefetch area is not set up correctly for ioremap.

The PCI registers are set up correctly in u-boot, and we can access the whole prefetch area in u-boot without any problems.

pci node in device tree:

	pci at f0010800 {
		device_type = "pci";
		reg = <f0010800 10c f00101ac 8 f00101c4 8>;
		compatible = "fsl,mpc8280-pci", "apmax-pci", "fsl,pq2-pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		clock-frequency = <d#49766400>;               // For our board.
		interrupt-map-mask = <f800 0 0 7>;            // Anded with the interrupt-map values
		interrupt-map = <
		                /* IDSEL 0x11 */
		                00008800 0 0 1 &PCI_INT 5>;   // 3 first numbers pci device specifier are: (buss << 16 | id_sel << 11) 0 0
		                                              //    buss = 0, id_sel = 11
		                                              // Next number is interrupt 1-4 mapped A-D (interrupt A for us)
		                                              // Last two numbers are host interrupt specifier (external interrupt 5)

		//interrupt-parent = <&PIC>;
		interrupt-parent = <&PCI_INT>; 
		// interrupts = <12 8>;
               // Mem type 0 Bus Add  Loc. Add 0 Length      <<--- Remember the mem type is little endian
		ranges = <42000000 0 80000000 80000000 0 10000000    // Pre-fetch memory
		          02000000 0 90000000 90000000 0 08000000    // Normal Memory
		          01000000 0 98000000 98000000 0 00010000>;  // I/O
		          
        bus-range = <0 ff>;
        pci at 12 {
    		device_type = "pci";
            reg = <9000 0 0 0 0>;
    		#interrupt-cells = <1>;
    		#size-cells = <2>;
    		#address-cells = <3>;
    		interrupt-parent = <&PCI_INT>; 
    		interrupt-map-mask = <0f800 0 0 7>;
    		interrupt-map = <
    		                /* IDSEL 0x10 */
    		                00000000 0 0 1 &PCI_INT 1

    		                /* IDSEL 0x11 */
    		                00000800 0 0 1 &PCI_INT 2
    		                
    		                /* IDSEL 0x12 */
    		                00001000 0 0 1 &PCI_INT 3
    		                
    		                /* IDSEL 0x13 */
    		                00001800 0 0 1 &PCI_INT 4 >;
        };
	};




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