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<TITLE>Problems with PCI on 8280</TITLE>
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<P><FONT SIZE=2>Hi.<BR>
We have e 8280 bioard with PCI. We have three memory ranges set up;<BR>
0x8000_0000 to 0x8fff_ffff is prefetchable memory<BR>
0x9000_0000 to 0x97ff_ffff is non-prefetchable memory<BR>
0x9800_0000 to 0x9800_ffff is IO.<BR>
<BR>
our device tree has<BR>
ranges = <42000000 0 80000000 80000000 0 10000000 // Pre-fetch memory<BR>
02000000 0 90000000 90000000 0 08000000 // Normal Memory<BR>
01000000 0 98000000 98000000 0 00010000>; // I/O<BR>
<BR>
for the memory ranges in the PCI node (full node at the end)<BR>
<BR>
Our problem is that we can only access the first 128MB of the prefetchable area.<BR>
an access to 0x87ff_ffff works (after ioremap), while an access to 0x8800_0000 causes an bus error.<BR>
<BR>
trying to access 0x87FFFFFC -> 0x00000000<BR>
trying to access 0x88000000 ->Machine check in kernel mode.<BR>
Caused by (from SRR1=49030): Transfer error ack signal<BR>
<BR>
It is like the prefetch area is not set up correctly for ioremap.<BR>
<BR>
The PCI registers are set up correctly in u-boot, and we can access the whole prefetch area in u-boot without any problems.<BR>
<BR>
pci node in device tree:<BR>
<BR>
pci@f0010800 {<BR>
device_type = "pci";<BR>
reg = <f0010800 10c f00101ac 8 f00101c4 8>;<BR>
compatible = "fsl,mpc8280-pci", "apmax-pci", "fsl,pq2-pci";<BR>
#interrupt-cells = <1>;<BR>
#size-cells = <2>;<BR>
#address-cells = <3>;<BR>
clock-frequency = <d#49766400>; // For our board.<BR>
interrupt-map-mask = <f800 0 0 7>; // Anded with the interrupt-map values<BR>
interrupt-map = <<BR>
/* IDSEL 0x11 */<BR>
00008800 0 0 1 &PCI_INT 5>; // 3 first numbers pci device specifier are: (buss << 16 | id_sel << 11) 0 0<BR>
// buss = 0, id_sel = 11<BR>
// Next number is interrupt 1-4 mapped A-D (interrupt A for us)<BR>
// Last two numbers are host interrupt specifier (external interrupt 5)<BR>
<BR>
//interrupt-parent = <&PIC>;<BR>
interrupt-parent = <&PCI_INT>;<BR>
// interrupts = <12 8>;<BR>
// Mem type 0 Bus Add Loc. Add 0 Length <<--- Remember the mem type is little endian<BR>
ranges = <42000000 0 80000000 80000000 0 10000000 // Pre-fetch memory<BR>
02000000 0 90000000 90000000 0 08000000 // Normal Memory<BR>
01000000 0 98000000 98000000 0 00010000>; // I/O<BR>
<BR>
bus-range = <0 ff>;<BR>
pci@12 {<BR>
device_type = "pci";<BR>
reg = <9000 0 0 0 0>;<BR>
#interrupt-cells = <1>;<BR>
#size-cells = <2>;<BR>
#address-cells = <3>;<BR>
interrupt-parent = <&PCI_INT>;<BR>
interrupt-map-mask = <0f800 0 0 7>;<BR>
interrupt-map = <<BR>
/* IDSEL 0x10 */<BR>
00000000 0 0 1 &PCI_INT 1<BR>
<BR>
/* IDSEL 0x11 */<BR>
00000800 0 0 1 &PCI_INT 2<BR>
<BR>
/* IDSEL 0x12 */<BR>
00001000 0 0 1 &PCI_INT 3<BR>
<BR>
/* IDSEL 0x13 */<BR>
00001800 0 0 1 &PCI_INT 4 >;<BR>
};<BR>
};<BR>
<BR>
<BR>
<BR>
<BR>
</FONT>
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