[Skiboot] [PATCH 06/12] naca: move naca definition from asm to C
Oliver O'Halloran
oohall at gmail.com
Tue Oct 1 14:32:00 AEST 2019
On Sun, 2019-09-29 at 17:46 +1000, Nicholas Piggin wrote:
> This results in the same layout and location of the naca and hv data
> structures.
>
> Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
> ---
> asm/asm-offsets.c | 2 --
> asm/head.S | 55 ++++---------------------------------------
> hdata/Makefile.inc | 2 +-
> hdata/hdata.h | 2 ++
> hdata/naca.c | 37 +++++++++++++++++++++++++++++
> hdata/naca.h | 58 ++++++++++++++++++++++++++++++++++++++++++++++
> hdata/spira.c | 11 ++++-----
> hdata/spira.h | 2 ++
> include/mem-map.h | 2 ++
> skiboot.lds.S | 5 ++++
> 10 files changed, 116 insertions(+), 60 deletions(-)
> create mode 100644 hdata/naca.c
> create mode 100644 hdata/naca.h
>
> diff --git a/asm/asm-offsets.c b/asm/asm-offsets.c
> index e4584059c..61a25cab3 100644
> --- a/asm/asm-offsets.c
> +++ b/asm/asm-offsets.c
> @@ -25,8 +25,6 @@ int main(void);
>
> int main(void)
> {
> - OFFSET(SPIRA_ACTUAL_SIZE, spira, reserved);
> -
> OFFSET(CPUTHREAD_PIR, cpu_thread, pir);
> OFFSET(CPUTHREAD_SAVE_R1, cpu_thread, save_r1);
> OFFSET(CPUTHREAD_STATE, cpu_thread, state);
> diff --git a/asm/head.S b/asm/head.S
> index 58f9aea97..54199be85 100644
> --- a/asm/head.S
> +++ b/asm/head.S
> @@ -99,6 +99,11 @@ hdat_entry:
> li %r27,0
> b boot_entry
>
> + /* See naca.c */
see what?
> + .= 0x1c0
> +fsp_entry:
> + b boot_entry
> +
How exactly does this work if skiboot is compiled for LE? The patched
instructions the FSP copies down are BE, but once it jumps here isn't
it just going to explode?
> .= 0x200
> mtsprg0 %r3
> mtsprg1 %r4
> @@ -806,56 +811,6 @@ enter_nap:
> bne 1b
> nap
> b .
> -/*
> - *
> - * NACA structure, accessed by the FPS to find the SPIRA
> - *
> - */
> - . = 0x4000
> -.global naca
> -naca:
> - .llong spirah /* 0x0000 : SPIRA-H */
> - .llong 0 /* 0x0008 : Reserved */
> - .llong 0 /* 0x0010 : Reserved */
> - .llong hv_release_data /* 0x0018 : HV release data */
> - .llong 0 /* 0x0020 : Reserved */
> - .llong 0 /* 0x0028 : Reserved */
> - .llong spira /* 0x0030 : SP Interface Root */
> - .llong hv_lid_load_table /* 0x0038 : LID load table */
> - .llong 0 /* 0x0040 : Reserved */
> - .space 68
> - .long 0 /* 0x008c : Reserved */
> - .space 16
> - .long SPIRA_ACTUAL_SIZE /* 0x00a0 : Actual size of SPIRA */
> - .space 28
> - .llong 0 /* 0x00c0 : resident module loadmap */
> - .space 136
> - .llong 0 /* 0x0150 : reserved */
> - .space 40
> - .llong 0 /* 0x0180 : reserved */
> - .space 36
> - .long 0 /* 0x01ac : control flags */
> - .byte 0 /* 0x01b0 : reserved */
> - .space 4
> - .byte 0 /* 0x01b5 : default state for SW attn */
> - .space 1
> - .byte 0x01 /* 0x01b7 : PCIA format */
> - .llong hdat_entry /* 0x01b8 : Primary thread entry */
> - .llong hdat_entry /* 0x01c0 : Secondary thread entry */
> - .space 0xe38
> -
> - .balign 0x10
> -hv_release_data:
> - .space 58
> - .llong 0x666 /* VRM ? */
> -
> - .balign 0x10
> -hv_lid_load_table:
> - .long 0x10
> - .long 0x10
> - .long 0
> - .long 0
> -
>
> /* The FSP seems to ignore our primary/secondary entry
> * points and instead copy that bit down to 0x180 and
> diff --git a/hdata/Makefile.inc b/hdata/Makefile.inc
> index 6f47314d4..67f809bc1 100644
> --- a/hdata/Makefile.inc
> +++ b/hdata/Makefile.inc
> @@ -1,7 +1,7 @@
> # -*-Makefile-*-
>
> SUBDIRS += hdata
> -HDATA_OBJS = spira.o paca.o pcia.o hdif.o memory.o fsp.o iohub.o vpd.o slca.o
> +HDATA_OBJS = naca.o spira.o paca.o pcia.o hdif.o memory.o fsp.o iohub.o vpd.o slca.o
> HDATA_OBJS += cpu-common.o vpd-common.o hostservices.o i2c.o tpmrel.o
> DEVSRC_OBJ = hdata/built-in.a
>
> diff --git a/hdata/hdata.h b/hdata/hdata.h
> index f77847172..da5146e7a 100644
> --- a/hdata/hdata.h
> +++ b/hdata/hdata.h
> @@ -5,6 +5,8 @@
> #define __HDATA_H
>
> #include <processor.h>
> +#include "hdif.h"
> +#include "spira.h"
>
> struct dt_node;
>
> diff --git a/hdata/naca.c b/hdata/naca.c
> new file mode 100644
> index 000000000..57504e9ae
> --- /dev/null
> +++ b/hdata/naca.c
> @@ -0,0 +1,37 @@
> +#include <compiler.h>
> +#include <mem-map.h>
> +#include <types.h>
> +
> +#include "naca.h"
> +#include "spira.h"
> +
> +__section(".naca.data") struct naca naca = {
> + .spirah_addr = CPU_TO_BE64(SPIRAH_OFF),
> + .secondary_thread_entry = 0,
> + .primary_lid_load_addr = 0,
> + .hv_release_data_addr = CPU_TO_BE64(NACA_OFF + offsetof(struct naca, hv_release_data)),
> + .opal_copy_code_addr = 0,
> + .spira_addr = CPU_TO_BE64(SPIRA_OFF),
> + .lid_table_addr = CPU_TO_BE64(NACA_OFF + offsetof(struct naca, hv_lid_load_table)),
> + .spira_size = CPU_TO_BE32(SPIRA_ACTUAL_SIZE),
> + .hv_load_map_addr = 0,
> + .attn_enabled = 0,
> + .pcia_supported = 1,
> + .__primary_thread_entry = CPU_TO_BE64(0x180),
> + .__secondary_thread_entry = CPU_TO_BE64(0x180),
> + .hv_release_data = {
> + .vrm = CPU_TO_BE32(0x666), /* ? */
> + },
> + .hv_lid_load_table = {
> + .w0 = CPU_TO_BE32(0x10),
> + .w1 = CPU_TO_BE32(0x10),
> + /* The FSP seems to ignore our primary/secondary entry
> + * points and instead copies these bits down to 0x180 and
> + * patch the first instruction to get our expected
> + * boot CPU number. We ignore that CPU number and go to
> + * the same entry we use for pHyp and FDT HB.
> + */
> + .w4 = CPU_TO_BE32(0x3b60ffff), /* li r27,-1 */
> + .w5 = CPU_TO_BE32(0x480001c2), /* ba 0x1c0 */
> + },
Put something in here about fsp_entry so we can grep for it.
> +};
> diff --git a/hdata/naca.h b/hdata/naca.h
> new file mode 100644
> index 000000000..5d73a3731
> --- /dev/null
> +++ b/hdata/naca.h
> @@ -0,0 +1,58 @@
> +// SPDX-License-Identifier: Apache-2.0
> +/* Copyright 2019 IBM Corp. */
> +
> +#ifndef __NACA_H
> +#define __NACA_H
> +
> +#include <compiler.h>
> +#include <inttypes.h>
> +#include <types.h>
> +
> +struct hv_release_data {
> + uint8_t reserved_0x0[58];
> + __be64 vrm;
> +} __packed __attribute__((aligned(0x10)));
> +
> +struct hv_lid_load_table {
> + __be32 w0;
> + __be32 w1;
> + __be32 w2;
> + __be32 w3;
> + __be32 w4;
> + __be32 w5;
> +} __packed __attribute__((aligned(0x10)));
> +
> +/*
> + * NACA structure, accessed by the FPS to find the SPIRA
s/FPS/FSP/, since you're changing it anyway.
> + */
> +struct naca {
> + __be64 spirah_addr;
> + __be64 secondary_thread_entry;
> + __be64 primary_lid_load_addr;
> + __be64 hv_release_data_addr;
> + __be64 opal_copy_code_addr;
> + uint8_t reserved_0x28[0x8];
> + __be64 spira_addr;
> + __be64 lid_table_addr;
> + uint8_t reserved_0x40[0x60];
> + __be32 spira_size;
> + uint8_t reserved_0xa4[0x1c];
> + __be64 hv_load_map_addr;
> + uint8_t reserved_0xc8[0xe4];
> + uint8_t flags[4];
> + uint8_t reserved_0x1b0[0x5];
> + uint8_t attn_enabled;
> + uint8_t reserved_0x1b6[0x1];
> + uint8_t pcia_supported;
Keep the reserved fields marked as reserved unless something is
actually using them. There's a lot of wierd legacy bullshit in the NACA
from the P7 / early P8 era and I'd rather we didn't start bringing it
back.
> + __be64 __primary_thread_entry;
> + __be64 __secondary_thread_entry;
IIRC the deprecated "opal" entry points here were still used by the FSP
lab builds when I was doing bringup in simics P9 FSP systems so that
might have been fixed at some point. Vasant might know.
Also, keep the offsets comments from the ASM versions. Reading HDAT
tables is annoying at the best of times and this isn't making it less
annoying.
> + uint8_t reserved_0x1d0[0xe38];
> + /* Not part of the naca but it's convenient to put them here */
> + struct hv_release_data hv_release_data;
> + struct hv_lid_load_table hv_lid_load_table;
> +} __packed __attribute((aligned(0x10)));
> +
> +extern struct naca naca;
> +
> +#endif
> diff --git a/hdata/spira.c b/hdata/spira.c
> index 40524e87e..8dd05e923 100644
> --- a/hdata/spira.c
> +++ b/hdata/spira.c
> @@ -3,7 +3,6 @@
>
> #include <inttypes.h>
> #include <device.h>
> -#include "spira.h"
> #include <cpu.h>
> #include <vpd.h>
> #include <interrupts.h>
> @@ -15,6 +14,8 @@
>
> #include "hdata.h"
> #include "hostservices.h"
> +#include "naca.h"
> +#include "spira.h"
>
> /* Processor Initialization structure, contains
> * the initial NIA and MSR values for the entry
> @@ -1695,15 +1696,11 @@ static void fixup_spira(void)
> static void update_spirah_addr(void)
> {
> #if !defined(TEST)
> - extern uint32_t naca;
> - uint64_t *spirah_offset = (uint64_t *)&naca;
> - uint64_t *spira_offset = (uint64_t *)((u64)(&naca) + 0x30);
> -
> if (proc_gen < proc_gen_p9)
> return;
>
> - *spirah_offset = SPIRAH_OFF;
> - *spira_offset = SPIRA_OFF;
> + naca.spirah_addr = CPU_TO_BE64(SPIRAH_OFF);
> + naca.spira_addr = CPU_TO_BE64(SPIRA_OFF);
> spirah.ntuples.hs_data_area.addr = CPU_TO_BE64(SPIRA_HEAP_BASE - SKIBOOT_BASE);
> spirah.ntuples.mdump_res.addr = CPU_TO_BE64(MDRT_TABLE_BASE - SKIBOOT_BASE);
> #endif
> diff --git a/hdata/spira.h b/hdata/spira.h
> index eb5d1ea1b..14fbc5f59 100644
> --- a/hdata/spira.h
> +++ b/hdata/spira.h
> @@ -80,6 +80,8 @@ struct spira {
> u8 reserved[0x60];
> } __packed __align(0x100);
>
> +#define SPIRA_ACTUAL_SIZE (sizeof(struct spira) - 0x60)
> +
> extern struct spira spira;
>
> /* SPIRA-H signature */
> diff --git a/include/mem-map.h b/include/mem-map.h
> index 991465190..90529df22 100644
> --- a/include/mem-map.h
> +++ b/include/mem-map.h
> @@ -21,6 +21,8 @@
> */
> #define EXCEPTION_VECTORS_END 0x2000
>
> +#define NACA_OFF 0x4000
> +
> /* The NACA and other stuff in head.S need to be at the start: we
> * give it 64k before placing the SPIRA and related data.
> */
> diff --git a/skiboot.lds.S b/skiboot.lds.S
> index 8890d69aa..3f90c25eb 100644
> --- a/skiboot.lds.S
> +++ b/skiboot.lds.S
> @@ -59,6 +59,11 @@ SECTIONS
> KEEP(*(.head))
> }
>
> + . = NACA_OFF;
> + .naca : {
> + KEEP(*(.naca.data))
> + }
> +
> . = SPIRA_OFF;
> .spira : {
> KEEP(*(.spira.data))
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