[Skiboot] [PATCH 06/12] naca: move naca definition from asm to C

[Nicholas Piggin]

Oliver O'Halloran's on October 1, 2019 2:32 pm:
> On Sun, 2019-09-29 at 17:46 +1000, Nicholas Piggin wrote:
>> This results in the same layout and location of the naca and hv data
>> structures.
>> 
>> Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
>> ---
>>  asm/asm-offsets.c  |  2 --
>>  asm/head.S         | 55 ++++---------------------------------------
>>  hdata/Makefile.inc |  2 +-
>>  hdata/hdata.h      |  2 ++
>>  hdata/naca.c       | 37 +++++++++++++++++++++++++++++
>>  hdata/naca.h       | 58 ++++++++++++++++++++++++++++++++++++++++++++++
>>  hdata/spira.c      | 11 ++++-----
>>  hdata/spira.h      |  2 ++
>>  include/mem-map.h  |  2 ++
>>  skiboot.lds.S      |  5 ++++
>>  10 files changed, 116 insertions(+), 60 deletions(-)
>>  create mode 100644 hdata/naca.c
>>  create mode 100644 hdata/naca.h
>> 
>> diff --git a/asm/asm-offsets.c b/asm/asm-offsets.c
>> index e4584059c..61a25cab3 100644
>> --- a/asm/asm-offsets.c
>> +++ b/asm/asm-offsets.c
>> @@ -25,8 +25,6 @@ int main(void);
>>  
>>  int main(void)
>>  {
>> -	OFFSET(SPIRA_ACTUAL_SIZE, spira, reserved);
>> -
>>  	OFFSET(CPUTHREAD_PIR, cpu_thread, pir);
>>  	OFFSET(CPUTHREAD_SAVE_R1, cpu_thread, save_r1);
>>  	OFFSET(CPUTHREAD_STATE, cpu_thread, state);
>> diff --git a/asm/head.S b/asm/head.S
>> index 58f9aea97..54199be85 100644
>> --- a/asm/head.S
>> +++ b/asm/head.S
>> @@ -99,6 +99,11 @@ hdat_entry:
>>  	li	%r27,0
>>  	b	boot_entry
>>  
> 
>> +	/* See naca.c */
> see what?

Good point.

>> +	.= 0x1c0
>> +fsp_entry:
>> +	b	boot_entry
>> +
> How exactly does this work if skiboot is compiled for LE? The patched
> instructions the FSP copies down are BE, but once it jumps here isn't
> it just going to explode?

Yeah I might have got that wrong. Have to fix endian here I guess.

>> +	.hv_lid_load_table = {
>> +		.w0 = CPU_TO_BE32(0x10),
>> +		.w1 = CPU_TO_BE32(0x10),
>> +		/* The FSP seems to ignore our primary/secondary entry
>> +		 * points and instead copies these bits down to 0x180 and
>> +		 * patch the first instruction to get our expected
>> +		 * boot CPU number. We ignore that CPU number and go to
>> +		 * the same entry we use for pHyp and FDT HB.
>> +		 */
>> +		.w4 = CPU_TO_BE32(0x3b60ffff),	/* li	r27,-1	*/
>> +		.w5 = CPU_TO_BE32(0x480001c2),	/* ba	0x1c0	*/
>> +	},
> 
> Put something in here about fsp_entry so we can grep for it.

Yeah will do.

>> + */
>> +struct naca {
>> +	__be64	spirah_addr;
>> +	__be64	secondary_thread_entry;
>> +	__be64	primary_lid_load_addr;
>> +	__be64	hv_release_data_addr;
>> +	__be64	opal_copy_code_addr;
>> +	uint8_t	reserved_0x28[0x8];
>> +	__be64	spira_addr;
>> +	__be64	lid_table_addr;
>> +	uint8_t	reserved_0x40[0x60];
>> +	__be32	spira_size;
>> +	uint8_t	reserved_0xa4[0x1c];
>> +	__be64	hv_load_map_addr;
>> +	uint8_t	reserved_0xc8[0xe4];
>> +	uint8_t	flags[4];
>> +	uint8_t	reserved_0x1b0[0x5];
>> +	uint8_t	attn_enabled;
>> +	uint8_t	reserved_0x1b6[0x1];
>> +	uint8_t	pcia_supported;
> 
> Keep the reserved fields marked as reserved unless something is
> actually using them. There's a lot of wierd legacy bullshit in the NACA
> from the P7 / early P8 era and I'd rather we didn't start bringing it
> back.

Okay.

>> +	__be64	__primary_thread_entry;
>> +	__be64	__secondary_thread_entry;
> IIRC the deprecated "opal" entry points here were still used by the FSP
> lab builds when I was doing bringup in simics P9 FSP systems so that
> might have been fixed at some point. Vasant might know.
> 
> Also, keep the offsets comments from the ASM versions. Reading HDAT
> tables is annoying at the best of times and this isn't making it less
> annoying.

Yeah good point.

Thanks,
Nick