[Skiboot] [PATCH] hw/npu2-hw-procedures.c: Update PHY_RESET procedure

[Alistair Popple]

On Mon, 21 Aug 2017 10:05:57 AM Reza Arbab wrote:
> On Fri, Aug 18, 2017 at 02:11:17PM +1000, Alistair Popple wrote:
> >Newer versions of Hostboot will have various clocks powered down by default
> >to save power. Therefore we need to power them up before accessing the OBUS
> >PHY.
> >
> >Signed-off-by: Alistair Popple <alistair at popple.id.au>
> >---
> >
> >Stewart,
> >
> >Reza wants to test this before we merge it so best to wait for his
> >reviewed/tested-by first. Thanks!
> 
> I got confirmation from the lab that this patch eliminates the 
> workaround they were using, but I was curious about one thing:
> 
> >@@ -252,6 +257,12 @@ static uint32_t phy_reset(struct npu2_dev *ndev)
> > {
> > 	int lane;
> >
> >+	/* Power on clocks */
> >+	phy_write(ndev, &NPU2_PHY_RX_CLKDIST_PDWN, 0);
> >+	phy_write(ndev, &NPU2_PHY_RX_IREF_PDWN, 1);
> 
> Shouldn't this one be 0 like the rest?

Not sure, we will have to confirm with Chris. According to what he gave me
though it should be 0x1:

rx_clkdist_pdwn :: indirect_reg(0x102) start_bit(48) width(3) = 0x0
rx_iref_pdwn_b  :: indirect_reg(0x118) start_bit(54) width(1) = 0x1
tx_clkdist_pdwn :: indirect_reg(0x182) start_bit(48) width(3) = 0x0
rx_ctl_datasm_clkdist_pdwn :: indirect_reg(0x170) start_bit(60) width(1) = 0x0

> >+	phy_write(ndev, &NPU2_PHY_TX_CLKDIST_PDWN, 0);
> >+	phy_write(ndev, &NPU2_PHY_RX_CTL_DATASM_CLKDIST_PDWN, 0);
> >+
> > 	FOR_EACH_LANE(ndev, lane)
> > 		phy_write_lane(ndev, &NPU2_PHY_RX_RUN_LANE, lane, 0);
> >
> 
>