[Skiboot] [PATCH v2 1/3] npu2: Update NPU to NPU2 in comments and messages

Sam Bobroff sam.bobroff at au1.ibm.com
Mon Aug 21 10:04:49 AEST 2017


On Fri, Aug 18, 2017 at 02:39:00PM +1000, Andrew Donnellan wrote:
> On 18/08/17 13:53, Sam Bobroff wrote:
> > Signed-off-by: Sam Bobroff <sam.bobroff at au1.ibm.com>
> 
> A couple of comments below but otherwise looks fine

Thanks, I've made those changes in the next version :-)

> > ---
> > ====== Version 1 -> version 2: ======
> > 
> > * Patch added.
> > 
> >   hw/npu2.c | 26 +++++++++++++-------------
> >   1 file changed, 13 insertions(+), 13 deletions(-)
> > 
> > diff --git a/hw/npu2.c b/hw/npu2.c
> > index 74e33255..8f5ad7e0 100644
> > --- a/hw/npu2.c
> > +++ b/hw/npu2.c
> > @@ -70,7 +70,7 @@ static bool is_p9dd1(void)
> >   /*
> >    * We use the indirect method because it uses the same addresses as
> > - * the MMIO offsets (NPU RING)
> > + * the MMIO offsets (NPU2 RING)
> 
> This should stay as NPU RING to match the workbook, IMHO.
> 
> >    */
> >   static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base,
> >   			       uint64_t addr, uint64_t size)
> > @@ -451,7 +451,7 @@ static int __npu2_dev_bind_pci_dev(struct phb *phb __unused,
> >   	pcislot = (char *)dt_prop_get(pci_dt_node, "ibm,slot-label");
> > -	prlog(PR_DEBUG, "NPU: comparing GPU %s and NPU %s\n",
> > +	prlog(PR_DEBUG, "NPU2: comparing GPU '%s' and NPU2 '%s'\n",
> >   	      pcislot, dev->slot_label);
> >   	if (streq(pcislot, dev->slot_label))
> > @@ -485,7 +485,7 @@ static void npu2_dev_bind_pci_dev(struct npu2_dev *dev)
> >   		}
> >   	}
> > -	prlog(PR_INFO, "%s: No PCI device for NPU device %04x:00:%02x.0 to bind to. If you expect a GPU to be there, this is a problem.\n",
> > +	prlog(PR_INFO, "%s: No PCI device for NPU2 device %04x:00:%02x.0 to bind to. If you expect a GPU to be there, this is a problem.\n",
> >   	      __func__, dev->npu->phb.opal_id, dev->index);
> >   }
> > @@ -683,15 +683,15 @@ static int npu2_dn_fixup(struct phb *phb,
> >   	npu2_dn_fixup_gmb(pd->dn, dev);
> >   	dt_add_property_cells(pd->dn, "ibm,nvlink", dev->dt_node->phandle);
> > -	/* NPU devices require a slot location to associate with GPUs */
> > +	/* NPU2 devices require a slot location to associate with GPUs */
> >   	dev->slot_label = dt_prop_get_def(pd->dn, "ibm,slot-label", NULL);
> >   	if (!dev->slot_label) {
> >   		/**
> >   		 * @fwts-label NPUNoPHBSlotLabel
> > -		 * @fwts-advice No GPU/NPU slot information was found.
> > +		 * @fwts-advice No GPU/NPU2 slot information was found.
> >   		 * NVLink2 functionality will not work.
> >   		 */
> > -		prlog(PR_ERR, "NPU: Cannot find GPU slot information\n");
> > +		prlog(PR_ERR, "NPU2: Cannot find GPU slot information\n");
> >   		return 0;
> >   	}
> > @@ -1215,8 +1215,8 @@ static void assign_mmio_bars(uint64_t gcid, uint32_t scom, uint64_t reg[2], uint
> >   }
> >   /*
> > - *Probe NPU device node and create PCI root device node
> > - * accordingly. The NPU device node should specify number
> > + * Probe NPU2 device node and create PCI root device node
> > + * accordingly. The NPU2 deivce node should specify number
> 
> device*
> 
> >    * of links and xscom base address to access links.
> >    */
> >   static void npu2_probe_phb(struct dt_node *dn)
> > @@ -1275,7 +1275,7 @@ static void npu2_probe_phb(struct dt_node *dn)
> >   	index = dt_prop_get_u32(dn, "ibm,npu-index");
> >   	phb_index = dt_prop_get_u32(dn, "ibm,phb-index");
> >   	links = dt_prop_get_u32(dn, "ibm,npu-links");
> > -	prlog(PR_INFO, "Chip %d Found NPU%d (%d links) at %s\n",
> > +	prlog(PR_INFO, "NPU2: Chip %d Found NPU2#%d (%d links) at %s\n",
> >   	      gcid, index, links, path);
> >   	free(path);
> > @@ -1617,7 +1617,7 @@ static void npu2_add_phb_properties(struct npu2 *p)
> >   	dt_add_property_cells(np, "clock-frequency", 0x200, 0);
> >           dt_add_property_cells(np, "interrupt-parent", icsp);
> > -	/* NPU PHB properties */
> > +	/* NPU2 PHB properties */
> >   	dt_add_property_cells(np, "ibm,opal-num-pes",
> >   			      NPU2_MAX_PE_NUM);
> >   	dt_add_property_cells(np, "ibm,opal-reserved-pe",
> > @@ -1687,9 +1687,9 @@ static void npu2_create_phb(struct dt_node *dn)
> >   		/**
> >   		 * @fwts-label NPUCannotCreatePHBSlot
> >   		 * @fwts-advice Firmware probably ran out of memory creating
> > -		 * NPU slot. NVLink functionality could be broken.
> > +		 * NPU2 slot. NVLink functionality could be broken.
> >   		 */
> > -		prlog(PR_ERR, "NPU: Cannot create PHB slot\n");
> > +		prlog(PR_ERR, "NPU2: Cannot create PHB slot\n");
> >   	}
> >   	pci_register_phb(&p->phb, OPAL_DYNAMIC_PHB_ID);
> > @@ -1710,7 +1710,7 @@ void probe_npu2(void)
> >   		prlog(PR_WARNING, "NPU2: Using ZCAL impedance override = %d\n", nv_zcal_nominal);
> >   	}
> > -	/* Scan NPU XSCOM nodes */
> > +	/* Scan NPU2 XSCOM nodes */
> >   	dt_for_each_compatible(dt_root, np, "ibm,power9-npu")
> >   		npu2_probe_phb(np);
> > 
> 
> -- 
> Andrew Donnellan              OzLabs, ADL Canberra
> andrew.donnellan at au1.ibm.com  IBM Australia Limited



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