Chassis sled cycle

[William Kennington]

It could be a GPIO on some systems or it could be I2C on others. It just
depends on the hotswap controller used for the platforms. That's why it is
a systemd target with arbitrary scripting provided by the platform.

On Tue, Mar 31, 2020 at 1:49 PM Vijay Khemka <vijaykhemka at fb.com> wrote:

>
>
> On 3/31/20, 10:53 AM, "Benjamin Fair" <benjaminfair at google.com> wrote:
>
>     On Mon, 30 Mar 2020 at 13:00, Vijay Khemka <vijaykhemka at fb.com> wrote:
>     >
>     > Hi Jason,
>     >
>     > We have a requirement of Chassis sled cycle and it can be achieved
> by sending an i2c command to hotswap controller. Is there any plan to add
> this feature in x86-power-control. It should take i2c bus address from
> configuration file.
>     >
>     >
>     >
>     > Regards
>     >
>     > -Vijay
>
>     This feature is implemented on some systems using an IPMI OEM command:
>
> https://github.com/openbmc/google-ipmi-sys#delayedhardreset---subcommand-0x03
>
>     It currently just activates the systemd target
>     gbmc-psu-hardreset.target and lets you register services to do the
>     actual hotswap reset (usually by toggling a GPIO). Having a unified
>     solution in x86-power-control for this would be great!
>
> Ben, please clarify if this is same as power reset or different from power
> reset. As HSC reset
> is being triggered by i2c command not through GPIO at least in our system.
> Power reset is
>  being triggered though POWER_RESET gpio pin and it is supported by
> x86-power-control.
>
> Regards
> -Vijay
>
>
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