<div dir="ltr">It could be a GPIO on some systems or it could be I2C on others. It just depends on the hotswap controller used for the platforms. That's why it is a systemd target with arbitrary scripting provided by the platform.</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Mar 31, 2020 at 1:49 PM Vijay Khemka <<a href="mailto:vijaykhemka@fb.com">vijaykhemka@fb.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><br>
<br>
On 3/31/20, 10:53 AM, "Benjamin Fair" <<a href="mailto:benjaminfair@google.com" target="_blank">benjaminfair@google.com</a>> wrote:<br>
<br>
On Mon, 30 Mar 2020 at 13:00, Vijay Khemka <<a href="mailto:vijaykhemka@fb.com" target="_blank">vijaykhemka@fb.com</a>> wrote:<br>
><br>
> Hi Jason,<br>
><br>
> We have a requirement of Chassis sled cycle and it can be achieved by sending an i2c command to hotswap controller. Is there any plan to add this feature in x86-power-control. It should take i2c bus address from configuration file.<br>
><br>
><br>
><br>
> Regards<br>
><br>
> -Vijay<br>
<br>
This feature is implemented on some systems using an IPMI OEM command:<br>
<a href="https://github.com/openbmc/google-ipmi-sys#delayedhardreset---subcommand-0x03" rel="noreferrer" target="_blank">https://github.com/openbmc/google-ipmi-sys#delayedhardreset---subcommand-0x03</a><br>
<br>
It currently just activates the systemd target<br>
gbmc-psu-hardreset.target and lets you register services to do the<br>
actual hotswap reset (usually by toggling a GPIO). Having a unified<br>
solution in x86-power-control for this would be great!<br>
<br>
Ben, please clarify if this is same as power reset or different from power reset. As HSC reset<br>
is being triggered by i2c command not through GPIO at least in our system. Power reset is <br>
being triggered though POWER_RESET gpio pin and it is supported by x86-power-control.<br>
<br>
Regards<br>
-Vijay <br>
<br>
</blockquote></div>