[PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system

Wed Sep 25 05:53:56 AEST 2019

at 3:25 AM, Andrew Jeffery <andrew at aj.id.au> wrote:

>
>
> On Fri, 20 Sep 2019, at 00:53, Brad Bishop wrote:
>> Rainier is a new Power system with an AST2600.
>>
>> Signed-off-by: Brad Bishop <bradleyb at fuzziesquirrel.com>
>> ---
>> v2:
>>   - reordered rainier DT elements (alphabetized).
>>   - added rainier rtc, lpc-ctl, reserved memory, mac devices
>> ---
>>  arch/arm/boot/dts/Makefile                   |   3 +-
>>  arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts | 485 +++++++++++++++++++
>>  2 files changed, 487 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 5af075c2f819..2f81a4be50a8 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -1293,4 +1293,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>>  	aspeed-bmc-opp-witherspoon.dtb \
>>  	aspeed-bmc-opp-zaius.dtb \
>>  	aspeed-bmc-portwell-neptune.dtb \
>> -	aspeed-bmc-quanta-q71l.dtb
>> +	aspeed-bmc-quanta-q71l.dtb \
>> +	aspeed-bmc-opp-rainier.dtb
>
> Rainier isn't an OpenPOWER Platform so we should drop the 'opp' or
> potentially substitute it with 'ibm' ("aspeed-bmc-ibm-rainier.dtb”).

I wondered about this.  Renamed to aspeed-bmc-ibm-rainier in v3.

>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>> b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>> new file mode 100644
>> index 000000000000..5f45b1effe4a
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>> @@ -0,0 +1,485 @@
>> +// SPDX-License-Identifier: GPL-2.0-or-later
>> +// Copyright 2019 IBM Corp.
>> +/dts-v1/;
>> +
>> +#include "aspeed-g6.dtsi"
>> +
>> +/ {
>> +	model = "Rainier";
>> +	compatible = "ibm,rainier-bmc", "aspeed,ast2600";
>> +
>> +	aliases {
>> +		serial4 = &uart5;
>> +	};
>> +
>> +	chosen {
>> +		stdout-path = &uart5;
>> +		bootargs = "console=ttyS4,115200n8";
>> +	};
>> +
>> +	memory at 80000000 {
>> +		device_type = "memory";
>> +		reg = <0x80000000 0x80000000>;
>
> Do we have 2GiB? According to the schematic I have it should be 1GiB.
> My schematic could be out of date though.

You are correct - changed to 1GB in v3.

>
>> +	};
>> +
>> +	reserved-memory {
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +		ranges;
>> +
>> +		flash_memory: region at 98000000 {
>> +			no-map;
>> +			reg = <0x98000000 0x04000000>; /* 64M */
>
> That's a strange place to put it given we have much more memory :) We
> picked that address for the AST2500-based OPP systems because it's
> the lowest usable address below the VGA region. If we have more RAM
> then we should move it up.

Moved to 0xbb000000 in v3.

>
>> +		};
>> +	};
>> +
>> +};
>> +
>> +&emmc_controller {
>> +	status = "okay";
>> +};
>> +
>> +&emmc {
>> +	status = "okay";
>> +};
>> +
>> +&fsim0 {
>> +	status = "okay";
>> +};
>> +
>> +&ibt {
>> +	status = "okay";
>> +};
>> +
>> +&i2c0 {
>> +	status = "okay";
>> +};
>> +
>> +&i2c1 {
>> +	status = "okay";
>> +};
>> +
>> +&i2c2 {
>> +	status = "okay";
>> +};
>> +
>> +&i2c3 {
>> +	status = "okay";
>> +
>> +	power-supply at 68 {
>> +		compatible = "ibm,cffps2";
>> +		reg = <0x68>;
>> +	};
>> +
>> +	power-supply at 69 {
>> +		compatible = "ibm,cffps2";
>> +		reg = <0x69>;
>> +	};
>> +
>> +	power-supply at 6a {
>> +		compatible = "ibm,cffps2";
>> +		reg = <0x6a>;
>> +	};
>> +
>> +	power-supply at 6b {
>> +		compatible = "ibm,cffps2";
>> +		reg = <0x6b>;
>> +	};
>> +};
>> +
>> +&i2c4 {
>> +	status = "okay";
>> +
>> +	tmp275 at 48 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x48>;
>> +	};
>> +
>> +	tmp275 at 49 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x49>;
>> +	};
>> +
>> +	tmp275 at 4a {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x4a>;
>> +	};
>> +};
>> +
>> +&i2c5 {
>> +	status = "okay";
>> +
>> +	tmp275 at 48 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x48>;
>> +	};
>> +
>> +	tmp275 at 49 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x49>;
>> +	};
>> +};
>> +
>> +&i2c6 {
>> +	status = "okay";
>> +
>> +	tmp275 at 48 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x48>;
>> +	};
>> +
>> +	tmp275 at 4a {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x4a>;
>> +	};
>> +
>> +	tmp275 at 4b {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x4b>;
>> +	};
>> +};
>> +
>> +&i2c7 {
>> +	status = "okay";
>> +
>> +	si7021-a20 at 20 {
>> +		compatible = "silabs,si7020";
>> +		reg = <0x20>;
>> +	};
>> +
>> +	tmp275 at 48 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x48>;
>> +	};
>> +
>> +	max31785 at 52 {
>> +		compatible = "maxim,max31785a";
>> +		reg = <0x52>;
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		fan at 0 {
>> +			compatible = "pmbus-fan";
>> +			reg = <0>;
>> +			tach-pulses = <2>;
>> +			maxim,fan-rotor-input = "tach";
>> +			maxim,fan-pwm-freq = <25000>;
>> +			maxim,fan-dual-tach;
>> +			maxim,fan-no-watchdog;
>> +			maxim,fan-no-fault-ramp;
>> +			maxim,fan-ramp = <2>;
>> +			maxim,fan-fault-pin-mon;
>> +		};
>> +
>> +		fan at 1 {
>> +			compatible = "pmbus-fan";
>> +			reg = <1>;
>> +			tach-pulses = <2>;
>> +			maxim,fan-rotor-input = "tach";
>> +			maxim,fan-pwm-freq = <25000>;
>> +			maxim,fan-dual-tach;
>> +			maxim,fan-no-watchdog;
>> +			maxim,fan-no-fault-ramp;
>> +			maxim,fan-ramp = <2>;
>> +			maxim,fan-fault-pin-mon;
>> +		};
>> +
>> +		fan at 2 {
>> +			compatible = "pmbus-fan";
>> +			reg = <2>;
>> +			tach-pulses = <2>;
>> +			maxim,fan-rotor-input = "tach";
>> +			maxim,fan-pwm-freq = <25000>;
>> +			maxim,fan-dual-tach;
>> +			maxim,fan-no-watchdog;
>> +			maxim,fan-no-fault-ramp;
>> +			maxim,fan-ramp = <2>;
>> +			maxim,fan-fault-pin-mon;
>> +		};
>> +
>> +		fan at 3 {
>> +			compatible = "pmbus-fan";
>> +			reg = <3>;
>> +			tach-pulses = <2>;
>> +			maxim,fan-rotor-input = "tach";
>> +			maxim,fan-pwm-freq = <25000>;
>> +			maxim,fan-dual-tach;
>> +			maxim,fan-no-watchdog;
>> +			maxim,fan-no-fault-ramp;
>> +			maxim,fan-ramp = <2>;
>> +			maxim,fan-fault-pin-mon;
>> +		};
>> +	};
>> +
>> +	pca0: pca9552 at 60 {
>> +		compatible = "nxp,pca9552";
>> +		reg = <0x60>;
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		gpio-controller;
>> +		#gpio-cells = <2>;
>> +
>> +		gpio at 0 {
>> +			reg = <0>;
>> +		};
>> +
>> +		gpio at 1 {
>> +			reg = <1>;
>> +		};
>> +
>> +		gpio at 2 {
>> +			reg = <2>;
>> +		};
>> +
>> +		gpio at 3 {
>> +			reg = <3>;
>> +		};
>> +
>> +		gpio at 4 {
>> +			reg = <4>;
>> +		};
>> +
>> +		gpio at 5 {
>> +			reg = <5>;
>> +		};
>> +
>> +		gpio at 6 {
>> +			reg = <6>;
>> +		};
>> +
>> +		gpio at 7 {
>> +			reg = <7>;
>> +		};
>> +
>> +		gpio at 8 {
>> +			reg = <8>;
>> +		};
>> +
>> +		gpio at 9 {
>> +			reg = <9>;
>> +		};
>> +
>> +		gpio at 10 {
>> +			reg = <10>;
>> +		};
>> +
>> +		gpio at 11 {
>> +			reg = <11>;
>> +		};
>> +
>> +		gpio at 12 {
>> +			reg = <12>;
>> +		};
>> +
>> +		gpio at 13 {
>> +			reg = <13>;
>> +		};
>> +
>> +		gpio at 14 {
>> +			reg = <14>;
>> +		};
>> +
>> +		gpio at 15 {
>> +			reg = <15>;
>> +		};
>> +	};
>> +
>> +	dps: dps310 at 76 {
>> +		compatible = "infineon,dps310";
>> +		reg = <0x76>;
>> +		#io-channel-cells = <0>;
>> +	};
>> +};
>> +
>> +&i2c8 {
>> +	status = "okay";
>> +
>> +	ucd90320 at b {
>> +		compatible = "ti,ucd90160";
>> +		reg = <0x0b>;
>> +	};
>> +
>> +	ucd90320 at c {
>> +		compatible = "ti,ucd90160";
>> +		reg = <0x0c>;
>> +	};
>> +
>> +	ucd90320 at 11 {
>> +		compatible = "ti,ucd90160";
>> +		reg = <0x11>;
>> +	};
>> +
>> +	rtc at 32 {
>> +		compatible = "epson,rx8900";
>> +		reg = <0x32>;
>> +	};
>> +
>> +	tmp275 at 48 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x48>;
>> +	};
>> +
>> +	tmp275 at 4a {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x4a>;
>> +	};
>> +};
>> +
>> +&i2c9 {
>> +	status = "okay";
>> +
>> +	ir35221 at 42 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x42>;
>> +	};
>> +
>> +	ir35221 at 43 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x43>;
>> +	};
>> +
>> +	ir35221 at 44 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x44>;
>> +	};
>> +
>> +	tmp423a at 4c {
>> +		compatible = "ti,tmp423";
>> +		reg = <0x4c>;
>> +	};
>> +
>> +	tmp423b at 4d {
>> +		compatible = "ti,tmp423";
>> +		reg = <0x4d>;
>> +	};
>> +
>> +	ir35221 at 72 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x72>;
>> +	};
>> +
>> +	ir35221 at 73 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x73>;
>> +	};
>> +
>> +	ir35221 at 74 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x74>;
>> +	};
>> +};
>> +
>> +&i2c10 {
>> +	status = "okay";
>> +
>> +	ir35221 at 42 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x42>;
>> +	};
>> +
>> +	ir35221 at 43 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x43>;
>> +	};
>> +
>> +	ir35221 at 44 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x44>;
>> +	};
>> +
>> +	tmp423a at 4c {
>> +		compatible = "ti,tmp423";
>> +		reg = <0x4c>;
>> +	};
>> +
>> +	tmp423b at 4d {
>> +		compatible = "ti,tmp423";
>> +		reg = <0x4d>;
>> +	};
>> +
>> +	ir35221 at 72 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x72>;
>> +	};
>> +
>> +	ir35221 at 73 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x73>;
>> +	};
>> +
>> +	ir35221 at 74 {
>> +		compatible = "infineon,ir35221";
>> +		reg = <0x74>;
>> +	};
>> +};
>> +
>> +&i2c11 {
>> +	status = "okay";
>> +
>> +	tmp275 at 48 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x48>;
>> +	};
>> +
>> +	tmp275 at 49 {
>> +		compatible = "ti,tmp275";
>> +		reg = <0x49>;
>> +	};
>> +};
>> +
>> +&i2c12 {
>> +	status = "okay";
>> +};
>> +
>> +&i2c13 {
>> +	status = "okay";
>> +};
>> +
>> +&i2c14 {
>> +	status = "okay";
>> +};
>> +
>> +&i2c15 {
>> +	status = "okay";
>> +};
>
> It might be worth splitting out the i2c bits as the support isn't yet
> upstream.

split out in v3.

>
>> +
>> +&lpc_ctrl {
>> +	status = "okay";
>> +	memory-region = <&flash_memory>;
>> +	flash = <&spi1>;
>
> Drop the flash property as we won't be using that.

dropped in v3.

>
>> +};
>> +
>> +&mac0 {
>> +	status = "okay";
>> +};
>> +
>> +&mac1 {
>> +	status = "okay";
>> +};
>> +
>> +&mac2 {
>> +	status = "okay";
>> +};
>> +
>> +&mac3 {
>> +	status = "okay";
>> +};
>
> Only MACs 3 and 4 are connected. Both should also have use-ncsi and request
> the RMII pinmux.

dropped 1 & 2, selected use-ncsi, and requested RMII pinmux in v3.

>
>> +
>> +&sdc {
>> +	status = "okay";
>> +};
>> +
>> +&sdhci0 {
>> +	status = "okay";
>> +
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&pinctrl_sd1_default>;
>> +};
>> +
>> +&sdhci1 {
>> +	status = "okay";
>> +
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&pinctrl_sd2_default>;
>> +};
>
> We're only using the eMMC controller (i.e. neither of the two SD slots),
> so we shouldn't be enabling these.

dropped in v3.

>
> Andrew