[PATCH dev-5.0 v1 1/3] ARM: dts: nuvoton: Add Quanta GSJ BMC machine.
Joel Stanley
joel at jms.id.au
Mon Apr 1 14:06:49 AEDT 2019
Hello,
On Thu, 28 Mar 2019 at 15:05, <fran.hsu at quantatw.com> wrote:
>
> From: FranHsu <Fran.Hsu at quantatw.com>
>
> Add a common device tree include file for NPCM730.
>
> Signed-off-by: FranHsu <Fran.Hsu at quantatw.com>
I am happy for these to be carried in the OpenBMC tree. However, can
you also submit them to the upstream list?
Cheers,
Joel
> ---
> arch/arm/boot/dts/nuvoton-npcm730.dtsi | 57 ++++++++++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100644 arch/arm/boot/dts/nuvoton-npcm730.dtsi
>
> diff --git a/arch/arm/boot/dts/nuvoton-npcm730.dtsi b/arch/arm/boot/dts/nuvoton-npcm730.dtsi
> new file mode 100644
> index 000000000000..20e13489b993
> --- /dev/null
> +++ b/arch/arm/boot/dts/nuvoton-npcm730.dtsi
> @@ -0,0 +1,57 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (c) 2018 Nuvoton Technology tomer.maimon at nuvoton.com
> +// Copyright 2018 Google, Inc.
> +
> +#include "nuvoton-common-npcm7xx.dtsi"
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + interrupt-parent = <&gic>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + enable-method = "nuvoton,npcm750-smp";
> +
> + cpu at 0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a9";
> + clocks = <&clk NPCM7XX_CLK_CPU>;
> + clock-names = "clk_cpu";
> + reg = <0>;
> + next-level-cache = <&l2>;
> + };
> +
> + cpu at 1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a9";
> + clocks = <&clk NPCM7XX_CLK_CPU>;
> + clock-names = "clk_cpu";
> + reg = <1>;
> + next-level-cache = <&l2>;
> + };
> + };
> +
> + soc {
> + timer at 3fe600 {
> + compatible = "arm,cortex-a9-twd-timer";
> + reg = <0x3fe600 0x20>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
> + IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&clk NPCM7XX_CLK_AHB>;
> + };
> + };
> +
> + ahb {
> + udc9:udc at f0839000 {
> + compatible = "nuvoton,npcm750-udc";
> + reg = <0xf0839000 0x1000
> + 0xfffd0000 0x800>;
> + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + clocks = <&clk NPCM7XX_CLK_SU>;
> + clock-names = "clk_usb_bridge";
> + };
> + };
> +};
> --
> 2.21.0
>
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