Question on PowerPC's JTAG instruction

[John Zhou]

Hi,

We want to design a tool to speed up our hardware diagnostics via JTAG
port.

So we have question to ask for your help:

1. How do we access PowerPC's internal GPRs and SPRs etc. via JTAG
instruction?

We'v gone through IEEE.1149.1.   There are no standard JTAG instruction to
access CPU's data bus, including internal or external data bus. Do we must
need private JTAG instruction to access CPU's internal resource? if it is,
could you share the documents with us?

2. For 'BSDL' usage, you know, we have many components on one board and much
more signals are processed specically. So, how to integrate PowerPC's BSDL
with other components' 'BSDL'?  Could you give us any hints on it? or any
document is also welcome!

Your any help is appreciated!

John Zhou
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