how to understand pci section in device tree source file

Scott Wood scottwood at
Tue Jun 24 03:02:10 EST 2008

zhanglei459 wrote:
> I guess  which refer to host-pci bridge ATMU,is right?


> But how to descripe
> added-on pci chip,whose BAR0 and BAR1 are IO spaces, BAR2 and BAR3  are MEM
> spaces.

You don't need to -- this can be probed at run-time.


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