problem in MPC8358 HDLC controller

[Biswal, Debasish]

Hi All,

I am developing a HDLC driver for the MPC8358 processor. This HDLC
driver will control the UCC(unified communication controller) 8 of the
MPC8358 core.  The problem I am facing is whenever I submit a packet to
the UCC8 HDLC controller to transmit my kernel crashes. It seems there
is a memory corruption happening since the crash point varies with each
iteration. The following is what I am doing 

 

1)       the GUMR register is configured(as per the user manual) 

2)       The Tx and Rx bd ring memory is allocated from the system
memory(using kmalloc).

3)       In the HDLC PARAMETER RAM memory map the RBASE and TBASE
registers are filled by converting the virtual addresses of the Tx and
Rx bds to physical address. 

4)       The parameter RAM is allocated from the qe memory from offset
0x3600 (as mentioned in ........

5)       There are two 16 bit registers in the parameter RAM memory base
named RIPTR and TIPTR( I am not sure if it needs to be filled, it is
currently initialized to 0x00000000). 

a.       As per the PPC user manual, a 32 byte memory aligned on a 32
byte boundary should be allocated and its pointer to be stored in these
registers but since kmalloc returns a 32 bit pointer how can it be
written into a 16 bit register.

6)       If I do not set the T_R(transmit ready bit that instructs the
HDLC controller to transmit a packet) than my driver is ok(of course its
not trying to send the packet and after some time the queue gets full)
and the kernel doesn't crashes but if I set the T_R bit and the
application tries to send something using my hdlc driver, then the
kernel crashes.

 

Any pointers towards finding what could be the possible reason of the
crash and how to debug the crash shall be highly appreciated.

 

 

 Regards,

Debasish Biswal

 

Phone:+91-124-4340845

Fax: +91-124-4340555

Email: dbiswal at ciena.com

 

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