cpm_dpalloc questions

[bhanu jampala]

Hi Guys,

Figured out that cpm_dpalloc is doing the memory allocation in the
range of  0x0000 - 0x3EFEC.
I tried to dig in and figured out that it is really not affecting me
as the memory address I dont wanted to be touched is 0x2000.
and existing drivers fcc and scc allocate memory at boot time and and
it is something range of ix100 -0x200.
so, no problem.

- mukund

On Thu, Aug 28, 2008 at 1:03 PM, bhanu jampala <adams.ppc at gmail.com> wrote:
> Hi Scott,
>
>> No, MCC1 PRAM starts at offset 0x8700.  Any other areas used are under
>> software control.
> Yes, you are right. But, I was refereing to MCC channel specific HDLC
> parameters.
>
> Reason: I am using the MCC2 which uses memory from offset 0x2000 to
> 0x4000 for Chan Specific parameters.
> you can see that in MCC chapter i.e. 29.3.1 on a MPC8280 manual.
> (channel specific HDLC parameters)
>
> I need to make sure that cpm_dpalloc is not using this part of DPRAM
> to allocate memory.
> I just wanne make sure no other device driver that use cpm_dpalloc to
> allocate memory for their BDs i.e. scc, smc, fcc.
>
> and it looks to me like it is allocating me memory starting from 0x128 or 0x400.
>
>> This is obsolete arch/ppc stuff and should be removed; the SMC pram is now
>> dynamically allocated and relocated (and before that, it came from the
>> device tree).
>
> Yes, I am using 2.6.19.2. I am right now in the middle of finalizing
> the BSP port. So, I cannot move on further to device trees. I will
> doing that stuff with in a month but now I am with 2.6.19.2.
>
> Regards,
> Adams
>