[PATCH 2/4] [PPC32] Add 440SPe support

[Eugene Surovegin]

On Thu, Sep 22, 2005 at 08:03:35PM -0700, Roland Dreier wrote:
> Add support for the AMCC PowerPC 440SPe SoC.

[snip]

> +static struct ocp_func_mal_data amc440spe_mal0_def = {
> +	.num_tx_chans   = 1,    	/* Number of TX channels */
> +	.num_rx_chans   = 1,    	/* Number of RX channels */
> +	.txeob_irq	= 38,		/* TX End Of Buffer IRQ  */
> +	.rxeob_irq	= 39,		/* RX End Of Buffer IRQ  */
> +	.txde_irq	= 34,		/* TX Descriptor Error IRQ */
> +	.rxde_irq	= 35,		/* RX Descriptor Error IRQ */
> +	.serr_irq	= 33,		/* MAL System Error IRQ    */
> +};
> +OCP_SYSFS_MAL_DATA()

Roland, I recently added new field (.dcr_base) to this structure (as a 
preparation step for new EMAC driver), could you do this for 440SPe as 
well? It's not needed right now, but as soon as new EMAC driver is in, 
440SPe will stop working.

[snip]

> +static void __init ppc4xx_pic_impl_init(void)
> +{
> +	/* Enable cascade interrupts in UIC0 */
> +	/* Enable cascade interrupt in UIC0 */

I think you probably missed this part :)

-- 
Eugene