reboot
Jason Chen
jason_chen at usish.com
Tue Sep 6 16:55:23 EST 2005
hi,all,
Unlike normally,I built a MPC8248 system whose u-boot set flash locating from 0xfe000000 to 0xfe7fffff (8M),and burned the u-boot on 0xfe700000.
The HRCW was set to CIP = 0 which means that exceptions are vectored to the physical address 0xFFFn_nnnn.
The u-boot and kernel run successfully,but failed while execute the command reboot.I found kernel run m8260_gorom below at the end of reboot be called.In these codes, MSR_ equal MSR_ME|MSR_RI originally,after be set to MSR_ME|MSR_RI|MSR_IP,the reboot can run successfully.
I wanna ask,in this case, is there a reset action? if there is, what cause it? if there is'nt, the cpu run to flash(0xfe700100) directly,then why MSR[ip] has to be set to 1? because in my system, exceptions address 0xfffn_nnnn did not exist at all.
And more,why my u-boot could run successfully while MSR[ip] = 1 but real exception vectors locate at 0xfe00_0n00?
.globl m8260_gorom /* r4 = addr in the rom,i set it to 0xfe700100 */
m8260_gorom:
mfmsr r0
rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */
sync
mtmsr r0
sync
mfspr r11, HID0
lis r10, 0
ori r10,r10,HID0_ICE|HID0_DCE
andc r11, r11, r10
mtspr HID0, r11
isync
li r5, MSR_
lis r6,2f at h
addis r6,r6,-KERNELBASE at h
ori r6,r6,2f at l
mtspr SRR0,r6
mtspr SRR1,r5
isync
sync
rfi
2:
mtlr r4
blr
Thanks very much!
Jason
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