Looking for architecture papers
    Segher Boessenkool 
    segher at kernel.crashing.org
       
    Thu Oct  4 18:46:16 AEST 2018
    
    
  
On Thu, Oct 04, 2018 at 10:41:13AM +0300, Raz wrote:
> Frankly, the more I read the more perplexed I get. For example,
> according to BOOK III-S, chapter 3,
> the MSR bits are differ from the ones described in
> arch/powerpc/include/asm/reg.h.
> Bit zero, is LE, but in the book it is 64-bit mode.
LE is bit 63, the least significant bit, value 0x0000000000000001.
SF is bit 0, the most significant bit, value 0x8000000000000000.
Some people wrongly start counting at the end, calling the least
significant bit "bit 0".  That isn't its name.
Segher
    
    
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