[PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync
benh at kernel.crashing.org
Wed Jun 27 08:10:03 EST 2012
On Tue, 2012-06-26 at 16:45 -0500, Scott Wood wrote:
> Some parts are due to corenet versus non-corenet, such as the actual
> register you write to to disable/enable the timebase.
> There's also a two-core assumption in the synchronization code which
> I've complained about multiple times -- although on closer inspection it
> looks like this is done under cpu_add_remove_lock, and we can assume
> that there's only one core at a time in take_timebase(), regardless of
> how many cores are in the system.
Right, it should work fine with any number of cores or am I missing
something ? (btw, since when complaining about something helps ? :-)
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