[PATCH v3 3/3] powerpc/fsl: 85xx: add cache-sram support

Scott Wood scottwood at freescale.com
Fri Nov 20 04:45:46 EST 2009


On Thu, Nov 19, 2009 at 08:29:19AM -0600, Kumar Gala wrote:
> >>+config FSL_85XX_CACHE_SRAM_BASE
> >>+	hex
> >>+	depends on FSL_85XX_CACHE_SRAM
> >>+	default "0xfff00000"
> >>+
> >
> >I really don't like setting the physical address this way, can we  
> >not do this via the device tree?
> 
> At a high level I think we should add something like the following in  
> the .dts:
> 
> sram at fff00000 {
> 	fsl,sram-ctrl-handle = <&L2>;
> 	reg = <0xfff00000 0xNNNN>;
> 	compatible = "fsl,mpc85xx-l2-sram";
> }
> 
> the NNNN can be the size the sram is configured as.

I don't see why this needs to go in the device tree, if it's the kernel
that is setting it up.  The kernel can pick any address and size it
wants.

-Scott


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