[PATCH v3 3/3] powerpc/fsl: 85xx: add cache-sram support

[Kumar Gala]

On Nov 19, 2009, at 8:21 AM, Kumar Gala wrote:

>> diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/ 
>> platforms/85xx/Kconfig
>> index d3a975e..b6f23c3 100644
>> --- a/arch/powerpc/platforms/85xx/Kconfig
>> +++ b/arch/powerpc/platforms/85xx/Kconfig
>> @@ -144,6 +144,15 @@ config SBC8560
>> 	help
>> 	  This option enables support for the Wind River SBC8560 board
>>
>> +config FSL_85XX_CACHE_SRAM
>> +	bool
>> +	select PPC_LIB_RHEAP
>> +
>> +config FSL_85XX_CACHE_SRAM_BASE
>> +	hex
>> +	depends on FSL_85XX_CACHE_SRAM
>> +	default "0xfff00000"
>> +
>
> I really don't like setting the physical address this way, can we  
> not do this via the device tree?

At a high level I think we should add something like the following in  
the .dts:

sram at fff00000 {
	fsl,sram-ctrl-handle = <&L2>;
	reg = <0xfff00000 0xNNNN>;
	compatible = "fsl,mpc85xx-l2-sram";
}

the NNNN can be the size the sram is configured as.

- k