[PATCH] Xilinx : Framebuffer Driver: Add PLB support (non-DCR)

[Roderick Colenbrander]

On Thu, Apr 9, 2009 at 2:46 PM, Josh Boyer <jwboyer at linux.vnet.ibm.com>wrote:

> On Wed, Apr 08, 2009 at 03:11:25PM -0600, John Linn wrote:
> >From: Suneel <[mailto:suneel.garapati at xilinx.com]>
> >
> >Added support for the new xps tft controller.
> >
> >The new core has PLB interface support in addition to existing
> >DCR interface.
> >
> >The driver has been modified to support this new core which
> >can be connected on PLB or DCR bus.
> >
> >Signed-off-by: Suneel <suneelg at xilinx.com>
> >Signed-off-by: John Linn <john.linn at xilinx.com>
> >---
> > drivers/video/xilinxfb.c |  227
> ++++++++++++++++++++++++++++++++--------------
> > 1 files changed, 160 insertions(+), 67 deletions(-)
> >
> >diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
> >index a82c530..a28a834 100644
> >--- a/drivers/video/xilinxfb.c
> >+++ b/drivers/video/xilinxfb.c
> >@@ -1,17 +1,24 @@
> > /*
> >- * xilinxfb.c
> >  *
> >- * Xilinx TFT LCD frame buffer driver
> >+ * Xilinx TFT frame buffer driver
> >  *
> >  * Author: MontaVista Software, Inc.
> >  *         source at mvista.com
> >  *
> >  * 2002-2007 (c) MontaVista Software, Inc.
> >  * 2007 (c) Secret Lab Technologies, Ltd.
> >+ * 2009 (c) Xilinx Inc.
> >  *
> >- * This file is licensed under the terms of the GNU General Public
> License
> >- * version 2.  This program is licensed "as is" without any warranty of
> any
> >- * kind, whether express or implied.
> >+ * This program is free software; you can redistribute it
> >+ * and/or modify it under the terms of the GNU General Public
> >+ * License as published by the Free Software Foundation;
> >+ * either version 2 of the License, or (at your option) any
> >+ * later version.
> >+ *
> >+ * You should have received a copy of the GNU General Public
> >+ * License along with this program; if not, write to the Free
> >+ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
> >+ * 02139, USA.
> >  */
>
> What Stephen said.
>
> > #define NUM_REGS      2
> > #define REG_FB_ADDR   0
> >@@ -112,6 +123,11 @@ struct xilinxfb_drvdata {
> >
> >       struct fb_info  info;           /* FB driver info record */
> >
> >+      u32             regs_phys;      /* phys. address of the control
> >+                                              registers */
>
> Is this driver usable on the 440 based Xilinx devices?  If so, is it
> possible
> to have the physical address of the registers above 4GiB, so is common with
> almost all the I/O on the other 440 boards?
>
>
The driver works fine on 440 based Xilinx boards (the ML510 I use has a 440
core). It might be nice to move physical addresses above 4GB for devices but
in all Xilinx tools and reference designs addresses below 4GB are used for
periperhals and I think even below 2GB (or even below 1GB). It depends on
the design.

Roderick Colenbrander
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