[PATCH 8/8] Cell IOMMU fixed mapping support
arnd at arndb.de
Wed Jan 30 11:54:01 EST 2008
On Tuesday 29 January 2008, Olof Johansson wrote:
> > > Shouldn't the fixed mapping be between 4G and 8G (and the offset for 1G
> > > is at 5G), to account for the MMIO range at 2-4G?
> > I don't think so, ie. it works setup like that, but I'm not entirely
> > sure why. Presumably the 2-4GB for MMIO is only for cycles heading out
> > of the CPU.
> Ben denied that being so yesterday. :-)
> If that's the case, then you can stick the dynamic range there for >32GB
> configs, since it's still addressable with 32 bits.
For addresses going from the CPU to the bus, RAM is occupying everything
from zero to SIZE_OF_RAM, while PCI MMIO starts at LARGE_NUMBER+2GB.
As seen from the PCI bus, DMA addresses for RAM range from zero to 2GB,
while the MMIO space is between 2GB and 4GB. The 64 bit space for
the linear mapping is between EVEN_LARGER_NUMBER and
The bridge chip remaps EVEN_LARGER_NUMBER to zero when going into the IOMMU,
so that the IOMMU can fit both SIZE_OF_RAM and the dynamic DMA window
into the 32GB bus address range.
I don't see how it should be possible here to reuse the 2-4GB range
for anything else.
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