[PATCH 0/7] [POWERPC] Xilinx: Device Tree updates for xilinx.
Grant Likely
grant.likely at secretlab.ca
Wed Jan 9 06:42:41 EST 2008
On 1/8/08, Stephen Neuendorffer <stephen.neuendorffer at xilinx.com> wrote:
> These patches synchronize all the in-kernel drivers to use the compatible names generated by the UBoot BSP generator. (at git://git.xilinx.com/gen-mhs-devtree.git)
>
> This set of patches should all be ready for 2.6.25: I've removed the ones that weren't and cleaned up the remainder. In particular, there was a nasty code/data section mismatch in the uartlite that showed up in the microblaze. I've also added a patch for the uartlite names in the boot serial that I missed the first time around and a patch that fixes some other section mismatch warnings in the uartlite.
>
> For reference, below is the device tree for a Virtex2Pro design. Except for some small changes mentioned before, this is entirely automatically generated from the EDK design.
Woo! Good looking device tree. :-)
I'll review your patches this afternoon.
Cheers,
g.
>
> Steve
>
> / {
> mem_size_cells: #address-cells = <1>;
> #size-cells = <1>;
> compatible = "xlnx,virtex";
> model = "testing";
> DDR_256MB_32MX64_rank1_row13_col10_cl2_5: memory at 0 {
> device_type = "memory";
> reg = < 0 memsize:10000000 >;
> } ;
> chosen {
> bootargs = "root=/dev/nfs nfsroot=172.19.221.221:/exports/xup/ydl41 ip=dhcp console=ttyUL0";
> } ;
> cpus {
> #address-cells = <1>;
> #cpus = <1>;
> #size-cells = <0>;
> PowerPC,405 at 0 {
> clock-frequency = <11e1a300>;
> d-cache-line-size = <20>;
> d-cache-size = <4000>;
> device_type = "cpu";
> i-cache-line-size = <20>;
> i-cache-size = <4000>;
> reg = <0>;
> timebase: timebase-frequency = <11e1a300>;
> xlnx,dcr-resync = <0>;
> xlnx,deterministic-mult = <0>;
> xlnx,disable-operand-forwarding = <1>;
> xlnx,mmu-enable = <1>;
> } ;
> } ;
> plb_v34 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "xlnx,plb-v34-1.02.a";
> ranges ;
> Ethernet_MAC: ethernet at 80400000 {
> compatible = "xlnx,plb-ethernet-1.01.a";
> device_type = "network";
> interrupt-parent = <&opb_intc_0>;
> interrupts = < 2 0 >;
> local-mac-address = [ 00 00 00 00 00 00 ];
> reg = < 80400000 10000 >;
> xlnx,dev-blk-id = <0>;
> xlnx,dev-mir-enable = <1>;
> xlnx,dma-intr-coalesce = <1>;
> xlnx,dma-present = <1>;
> xlnx,err-count-exist = <1>;
> xlnx,fcs-insert-exist = <1>;
> xlnx,half-duplex-exist = <1>;
> xlnx,include-dev-pencoder = <1>;
> xlnx,ipif-fifo-depth = <8000>;
> xlnx,mac-fifo-depth = <40>;
> xlnx,mii-exist = <1>;
> xlnx,miim-clkdvd = <13>;
> xlnx,pad-insert-exist = <1>;
> xlnx,reset-present = <1>;
> xlnx,source-addr-insert-exist = <1>;
> } ;
> opb_v20 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "xlnx,opb-v20-1.10.c";
> ranges ;
> Audio_Codec: opb-ac97 at 7d400000 {
> compatible = "xlnx,opb-ac97-2.00.a";
> interrupt-parent = <&opb_intc_0>;
> interrupts = < 1 0 >;
> reg = < 7d400000 10000 >;
> xlnx,intr-level = <1>;
> xlnx,playback = <1>;
> xlnx,record = <1>;
> xlnx,use-bram = <1>;
> } ;
> DIPSWs_4Bit: opb-gpio at 40020000 {
> compatible = "xlnx,opb-gpio-3.01.b";
> reg = < 40020000 10000 >;
> xlnx,all-inputs = <1>;
> xlnx,all-inputs-2 = <0>;
> xlnx,dout-default = <0>;
> xlnx,dout-default-2 = <0>;
> xlnx,gpio-width = <4>;
> xlnx,interrupt-present = <0>;
> xlnx,is-bidir = <1>;
> xlnx,is-bidir-2 = <1>;
> xlnx,is-dual = <0>;
> xlnx,tri-default = <ffffffff>;
> xlnx,tri-default-2 = <ffffffff>;
> xlnx,user-id-code = <3>;
> } ;
> LEDs_4Bit: opb-gpio at 40000000 {
> compatible = "xlnx,opb-gpio-3.01.b";
> reg = < 40000000 10000 >;
> xlnx,all-inputs = <0>;
> xlnx,all-inputs-2 = <0>;
> xlnx,dout-default = <0>;
> xlnx,dout-default-2 = <0>;
> xlnx,gpio-width = <4>;
> xlnx,interrupt-present = <0>;
> xlnx,is-bidir = <0>;
> xlnx,is-bidir-2 = <1>;
> xlnx,is-dual = <0>;
> xlnx,tri-default = <ffffffff>;
> xlnx,tri-default-2 = <ffffffff>;
> xlnx,user-id-code = <3>;
> } ;
> PS2_Ports: opb-ps2-dual-ref at 7a400000 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "xlnx,compound";
> ranges = < 0 7a400000 10000 >;
> opb-ps2-dual-ref at 0 {
> compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
> interrupt-parent = <&opb_intc_0>;
> interrupts = < 6 0 >;
> reg = < 0 40 >;
> } ;
> opb-ps2-dual-ref at 1000 {
> compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
> interrupt-parent = <&opb_intc_0>;
> interrupts = < 5 0 >;
> reg = < 1000 40 >;
> } ;
> } ;
> PushButtons_5Bit: opb-gpio at 40040000 {
> compatible = "xlnx,opb-gpio-3.01.b";
> reg = < 40040000 10000 >;
> xlnx,all-inputs = <1>;
> xlnx,all-inputs-2 = <0>;
> xlnx,dout-default = <0>;
> xlnx,dout-default-2 = <0>;
> xlnx,gpio-width = <5>;
> xlnx,interrupt-present = <0>;
> xlnx,is-bidir = <1>;
> xlnx,is-bidir-2 = <1>;
> xlnx,is-dual = <0>;
> xlnx,tri-default = <ffffffff>;
> xlnx,tri-default-2 = <ffffffff>;
> xlnx,user-id-code = <3>;
> } ;
> RS232_Uart_1: serial at 40400000 {
> compatible = "xlnx,opb-uartlite-1.00.b";
> device_type = "serial";
> interrupt-parent = <&opb_intc_0>;
> interrupts = < 4 0 >;
> port-number = <0>;
> reg = < 40400000 10000 >;
> xlnx,baudrate = <2580>;
> xlnx,clk-freq = <5f5e100>;
> xlnx,data-bits = <8>;
> xlnx,odd-parity = <0>;
> xlnx,use-parity = <0>;
> } ;
> SysACE_CompactFlash: opb-sysace at 41800000 {
> compatible = "xlnx,opb-sysace-1.00.c";
> interrupt-parent = <&opb_intc_0>;
> interrupts = < 3 0 >;
> reg = < 41800000 10000 >;
> xlnx,mem-width = <10>;
> } ;
> dcr_v29 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "xlnx,dcr-v29-1.00.a";
> ranges = < 0 40700000 1000 >;
> VGA_FrameBuffer: plb-tft-cntlr-ref at 200 {
> compatible = "xlnx,plb-tft-cntlr-ref-1.00.a";
> reg = < 200 8 >;
> xlnx,default-tft-base-addr = <7f>;
> xlnx,dps-init = <1>;
> xlnx,on-init = <1>;
> xlnx,pixclk-is-busclk-divby4 = <1>;
> } ;
> } ;
> onewire_0: opb-onewire at 7a200000 {
> compatible = "xlnx,opb-onewire-1.00.a";
> reg = < 7a200000 10000 >;
> xlnx,add-pullup = "true";
> xlnx,checkcrc = "true";
> xlnx,clk-div = <f>;
> } ;
> opb_hwicap_0: opb-hwicap at 41300000 {
> compatible = "xlnx,opb-hwicap-1.00.b";
> reg = < 41300000 10000 >;
> } ;
> opb_intc_0: interrupt-controller at 41200000 {
> #interrupt-cells = <2>;
> compatible = "xlnx,opb-intc-1.00.c";
> interrupt-controller ;
> reg = < 41200000 10000 >;
> xlnx,num-intr-inputs = <7>;
> } ;
> opb_timer_0: opb-timer at 40800000 {
> compatible = "xlnx,opb-timer-1.00.b";
> interrupt-parent = <&opb_intc_0>;
> interrupts = < 0 0 >;
> reg = < 40800000 100 >;
> xlnx,count-width = <20>;
> xlnx,gen0-assert = <1>;
> xlnx,gen1-assert = <1>;
> xlnx,one-timer-only = <0>;
> xlnx,trig0-assert = <1>;
> xlnx,trig1-assert = <1>;
> } ;
> } ;
> } ;
> } ;
>
>
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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