[RFC PATCH 1/3] Add StorCenter DTS first draft.

[Grant Likely]

On 1/7/08, Jon Loeliger <jdl at jdl.com> wrote:
> Based on the Kurobox DTS files.
>
> Signed-off-by: Andy Wilcox <andy at protium.com>
> Signed-off-by: Jon Loeliger <jdl at jdl.com>
> ---
>
> Ignore the flash bits.  They are from the previous
> World View and need to be updated still.
>
>  arch/powerpc/boot/dts/storcenter.dts |  159 ++++++++++++++++++++++++++++++++++
>  1 files changed, 159 insertions(+), 0 deletions(-)
>  create mode 100644 arch/powerpc/boot/dts/storcenter.dts
>
> diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
> new file mode 100644
> index 0000000..68887ac
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/storcenter.dts
> @@ -0,0 +1,159 @@
> +       soc at 80000000 {
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               device_type = "soc";
> +               compatible = "fsl,mpc8241", "mpc10x";
> +               store-gathering = <0>; /* 0 == off, !0 == on */
> +
> +               reg = <80000000 00100000>;              /* Temporary, right? */
> +
> +               ranges = <80000000 80000000 70000000    /* pci mem space */
> +                         fdf00000 fdf00000 00100000    /* EUMB */
> +                         fe000000 fe000000 00c00000    /* pci i/o space */
> +                         fec00000 fec00000 00300000    /* pci cfg regs */
> +                         fef00000 fef00000 00100000>;  /* pci iack */

This doesn't look nice.  On the other ppc boards, Kumar moved the pci
bus node out of the soc node so the the internal register range is
separate from the soc.

I think it should look like this:

{
    soc at fdf00000 {
        compatible = "fsl,mpc8241-immr";
        ranges = <0 fe000000 00100000>;
        serial at 4500 {
            blah....
        };
        blah....
    };
    pci at 800000000 {
        ranges = blah....
    };
};

> +
> +               i2c at fdf03000 {
> +               serial0: serial at fdf04500 {
> +                       cell-index = <0>;
> +                       device_type = "serial";
> +                       compatible = "ns16550";
> +                       reg = <fdf04500 8>;
> +                       clock-frequency = <d# 97553800>; /* Hz */

That's kind of an odd number for clock frequency.  Usually clock
frequencies are *big* and *round*.  :-)

> +                       current-speed = <d# 115200>;
> +                       interrupts = <9 2>;
> +                       interrupt-parent = <&mpic>;
> +               };
> +

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely at secretlab.ca
(403) 399-0195