BenH bh40 at calva.net
Tue Feb 9 22:02:08 EST 1999

The up-to-date l2cr code should be in vger now, we disabled the
command-line option for now (it required changes in non-arch specific
sources, and we wanted to avoid this because of the merge). The l2cr
value can still be passed by BootX using the device-tree. Just open bootx
preferences with resedit, add an "L2CR" resource ID 0 which is 4 bytes
long, and stuff your L2CR value in it. This will enable the "Set G3
cache" option in BootX.

Future version of PowerLogix software may be able to set BootX
Preferences directly. I'll write a tool for capturing MacOS current L2CR
value real soon now.

On Mon, Feb 8, 1999, Kyle Nesbit <kyle.nesbit at asu.edu> wrote:

>I am currently looking for some more info on how to get my L2 backside cache
>running.  I am using a powerlogix card.
>I have used the powerlogix/Ben patch posted in the mailing list during Dec.
>The kernel compiled without and error.  When I try to pass the l2cr kernel
>argument I get nothing.  my /proc/sys/kernel/l2cr is 00000000: disabled,
>Another thing that is strange is in /proc/cpuinfo the clock rate of my chip
>is off by over 100 MHZ.
>I would greatly appreciate if someone could point me to more info on the

           E-Mail: <mailto:bh40 at calva.net>
BenH.      Web   : <http://calvaweb.calvacom.fr/bh40/>

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