[PATCH v2 3/8] ARM/dts: OMAP3: Add McBSP entries
Peter Ujfalusi
peter.ujfalusi at ti.com
Wed Aug 29 23:31:02 EST 2012
Create the needed sections to be able to probe McBSP ports via DT.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi at ti.com>
---
arch/arm/boot/dts/omap3.dtsi | 69 ++++++++++++++++++++++++++++++++++++++++++
1 files changed, 69 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 8109471..5c14b00 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -220,5 +220,74 @@
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
};
+
+ mcbsp1: mcbsp at 48074000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x48074000 0xff>;
+ reg-names = "mpu";
+ interrupts = <0 16 0x4>, /* OCP compliant interrupt */
+ <0 59 0x4>, /* TX interrupt */
+ <0 60 0x4>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp at 49022000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49022000 0xff>,
+ <0x49028000 0xff>;
+ reg-names = "mpu", "sidetone";
+ interrupts = <0 17 0x4>, /* OCP compliant interrupt */
+ <0 62 0x4>, /* TX interrupt */
+ <0 63 0x4>, /* RX interrupt */
+ <0 4 0x4>; /* Sidetone */
+ interrupt-names = "common", "tx", "rx", "sidetone";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <1280>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp at 49024000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49024000 0xff>,
+ <0x4902a000 0xff>;
+ reg-names = "mpu", "sidetone";
+ interrupts = <0 22 0x4>, /* OCP compliant interrupt */
+ <0 89 0x4>, /* TX interrupt */
+ <0 90 0x4>, /* RX interrupt */
+ <0 5 0x4>; /* Sidetone */
+ interrupt-names = "common", "tx", "rx", "sidetone";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
+
+ mcbsp4: mcbsp at 49026000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49026000 0xff>;
+ reg-names = "mpu";
+ interrupts = <0 23 0x4>, /* OCP compliant interrupt */
+ <0 54 0x4>, /* TX interrupt */
+ <0 55 0x4>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp4";
+ };
+
+ mcbsp5: mcbsp at 48096000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x48096000 0xff>;
+ reg-names = "mpu";
+ interrupts = <0 27 0x4>, /* OCP compliant interrupt */
+ <0 81 0x4>, /* TX interrupt */
+ <0 82 0x4>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp5";
+ };
};
};
--
1.7.8.6
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