[Skiboot] [PATCH v2 45/59] xive/p10: Activate has_array when PQ_disable is available

[Vasant Hegde]

From: Cédric Le Goater <clg at kaod.org>

hash_array is an Internal cache hashing optimization. It tracks for
ESBs where the original trigger came from so that we avoid getting the
EAS into the cache twice.

Signed-off-by: Cédric Le Goater <clg at kaod.org>
Signed-off-by: Vasant Hegde <hegdevasant at linux.vnet.ibm.com>
---
 hw/xive2.c           | 11 ++++++++---
 include/xive2-regs.h |  2 ++
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/hw/xive2.c b/hw/xive2.c
index 0f9c93d6a..1ad1f138d 100644
--- a/hw/xive2.c
+++ b/hw/xive2.c
@@ -1610,15 +1610,20 @@ static bool xive_cfg_save_restore(struct xive *x)
  *   1/3rd of the cache is reserved for PHB ESBs and the rest to
  *   IPIs. This is sufficient to keep all the PHB ESBs in cache and
  *   avoid ESB cache misses during IO interrupt processing.
+ *
+ * hash_array_enable :
+ *   Internal cache hashing optimization. The hash_array tracks for
+ *   ESBs where the original trigger came from so that we avoid
+ *   getting the EAS into the cache twice.
  */
 static void xive_config_esb_cache(struct xive *x)
 {
 	uint64_t val = xive_regr(x, VC_ESBC_CFG);
 
 	if (xive_has_cap(x, CQ_XIVE_CAP_PHB_PQ_DISABLE)) {
-		val |= VC_ESBC_CFG_SPLIT_MODE;
-		xive_dbg(x, "ESB cache configured with split mode. "
-			 "VC_ESBC_CFG=%016llx\n", val);
+		val |= VC_ESBC_CFG_SPLIT_MODE | VC_ESBC_CFG_HASH_ARRAY_ENABLE;
+		xive_dbg(x, "ESB cache configured with split mode "
+			 "and hash array. VC_ESBC_CFG=%016llx\n", val);
 	} else
 		val &= ~VC_ESBC_CFG_SPLIT_MODE;
 
diff --git a/include/xive2-regs.h b/include/xive2-regs.h
index 4638c3d89..c2ed265f6 100644
--- a/include/xive2-regs.h
+++ b/include/xive2-regs.h
@@ -230,6 +230,8 @@
 /* ESBC configuration */
 #define X_VC_ESBC_CFG				0x148
 #define VC_ESBC_CFG				0x240
+#define	 VC_ESBC_CFG_HASH_ARRAY_ENABLE		PPC_BIT(40)
+#define	 VC_ESBC_CFG_HASH_STORE_MODE		PPC_BITMASK(41,42)
 #define	 VC_ESBC_CFG_SPLIT_MODE			PPC_BIT(56)
 
 /* EASC flush control register */
-- 
2.31.1