[Skiboot] [PATCH v3] hw/npu2-opencapi: Support multiple LPC devices
Andrew Donnellan
ajd at linux.ibm.com
Tue Jan 28 18:16:58 AEDT 2020
On 28/1/20 4:21 pm, Oliver O'Halloran wrote:
> On Tue, 2020-01-28 at 14:02 +1100, Andrew Donnellan wrote:
>> Currently, we only have a single range for LPC memory per chip, and we only
>> allow a single device to use that range.
>>
>> With upcoming Hostboot/SBE changes, we'll use the chip address extension
>> mask to give us multiple ranges by using the masked bits of the group ID.
>>
>> Each device can now allocate a whole 4TB non-mirrored region. We still
>> don't do >4TB ranges.
>
> This patch seems like the sort of thing that'll need to be re-written
> entirely when we decide to support >4TB allocations. Oh well.
Yep. The way addresses are structured on P8 and the restrictions of the
chip address mask that has been chosen makes it difficult to do >4TB of
contiguous memory in any case - we can assign multiple discontiguous 4TB
ranges to a single card by masking off some bits, but from a Linux
perspective that's less useful. We'll cross that bridge if/when required
to...
>>
>> - phys_map_get(dev->npu->chip_id, OCAPI_MEM, 0, &phys_map_base, &phys_map_size);
>> + xscom_read(dev->npu->chip_id, PB_CENT_MODE, &val);
>
>> + if (GETFIELD(PB_CFG_CHIP_ADDR_EXTENSION_MASK_CENT, val) == 0b1100100) {
>
> Magic constant probably needs a comment.
>
>> + phys_map_get(dev->npu->chip_id, OCAPI_MEM,
>> + dev->brick_index - 2, &phys_map_base,
>> + &phys_map_size);
>> + } else {
>> + bool in_use = false;
> newline between variable and code
Will fix in v4.
--
Andrew Donnellan OzLabs, ADL Canberra
ajd at linux.ibm.com IBM Australia Limited
More information about the Skiboot
mailing list