[Skiboot] [PATCH] asm/head: set skiboot TOC in interrupt handler entry

[Nicholas Piggin]

Some code runs with r2 not set to the skiboot TOC, for example the
secureboot CVC (see call_rom_entry). If a system reset or machine
check is taken at this time, the skiboot interrupt handler will
crash badly rather than report it.

So set the skiboot TOC into r2 in the interrupt entry code. r2 is
already saved and restored, so in the case of recoverable exceptions,
this will restore the correct r2 when returning to such code.

This issue was found by Stewart, and this patch is based on his
initial fix, with some modification.

Cc: Stewart Smith <stewart at linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
---
 asm/head.S | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/asm/head.S b/asm/head.S
index 18a9c12cf..4ec62fb48 100644
--- a/asm/head.S
+++ b/asm/head.S
@@ -235,10 +235,12 @@ _exception:
 	stw	%r4,STACK_XER(%r1)
 	std	%r5,STACK_CTR(%r1)
 	std	%r6,STACK_LR(%r1)
-	mr	%r3,%r1
 	LOAD_IMM64(%r4, SKIBOOT_BASE)
-	LOAD_IMM32(%r5, exception_entry_foo - __head)
-	add	%r4,%r4,%r5
+	LOAD_IMM32(%r5,__toc_start - __head)
+	LOAD_IMM32(%r6, exception_entry_foo - __head)
+	add	%r2,%r4,%r5
+	mr	%r3,%r1
+	add	%r4,%r4,%r6
 	mtctr	%r4
 	bctr
 exception_entry_foo:
-- 
2.22.0