[Skiboot] [PATCH stable 2/3] hdata/i2c: Make SPD workaround more workaroundy

[Pavaman Subramaniyam]

From: Oliver O'Halloran <oohall at gmail.com>

commit f88e3724846346efd66cc423ea7a96972592cd28 upstream.

We have a hack in the I2C device parser to fix up entries generated by
hostboot for the DIMM SPD devices. For some reason they get reported as
128Kbit EEPROMs which is bad since those have a different I2C interface
to an actual SPD device.

Oddly enough, the FSP also gets this wrong in a slightly different way.
In the FSP case they are reported as a at24c04 (4Kbit) EEPROM, which
also has a different I2C interface.

To fix both these problems for any eeprom we find on that bus to have
the compatible string of "spd".

Signed-off-by: Oliver O'Halloran <oohall at gmail.com>
Reviewed-by: Vasant Hegde <hegdevasant at linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart at linux.ibm.com>
---
 hdata/i2c.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/hdata/i2c.c b/hdata/i2c.c
index 3de575f..939ba76 100644
--- a/hdata/i2c.c
+++ b/hdata/i2c.c
@@ -298,10 +298,15 @@ int parse_i2c_devs(const struct HDIF_common_hdr *hdr, int idata_index,
 		 * driver will send 2 bytes when doing a random read,
 		 * potentially overwriting part of the SPD information.
 		 *
-		 * To work around this we force the compat string to "spd"
+		 * Just to make things interested the FSP also gets the device
+		 * type wrong. To work around both just set the device-type to
+		 * "spd" for anything in the 0x50 to 0x57 range since that's the
+		 * SPD eeprom range.
+		 *
+		 * XXX: Future chips might not use engine 3 for the DIMM buses.
 		 */
-		if (proc_gen == proc_gen_p9 && dev->type == 0x2 &&
-		    dev->i2cm_engine == 3) {
+		if (dev->i2cm_engine == 3 && dev_addr >= 0x50
+		    && dev_addr < 0x58) {
 			compat = "spd";
 			name = "eeprom";
 		} else if (type) {
-- 
2.4.3