[Skiboot] [PATCH] xive: disable store EOI support
Cédric Le Goater
clg at kaod.org
Fri Mar 23 23:55:28 AEDT 2018
Hardware has limitations which would require to put a sync after each
store EOI to make sure the MMIO operations that change the ESB state
are ordered. This is a killer for performance and the PHBs do not
support the sync. So remove the store EOI for the moment, until
hardware is improved.
Signed-off-by: Cédric Le Goater <clg at kaod.org>
---
hw/xive.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/hw/xive.c b/hw/xive.c
index 468e5b0446e9..01913768118f 100644
--- a/hw/xive.c
+++ b/hw/xive.c
@@ -486,6 +486,10 @@ struct xive {
void *q_ovf;
};
+#define XIVE_STORE_EOI_ENABLED 0
+#define XIVE_CAN_STORE_EOI(x) \
+ (XIVE_STORE_EOI_ENABLED && ((x)->rev >= XIVE_REV_2))
+
/* Global DT node */
static struct dt_node *xive_dt_node;
@@ -1750,7 +1754,11 @@ static bool xive_config_init(struct xive *x)
/* Enable StoreEOI */
val = xive_regr(x, VC_SBC_CONFIG);
- val |= VC_SBC_CONF_CPLX_CIST | VC_SBC_CONF_CIST_BOTH;
+ if (XIVE_CAN_STORE_EOI(x))
+ val |= VC_SBC_CONF_CPLX_CIST | VC_SBC_CONF_CIST_BOTH;
+ else
+ xive_dbg(x, "store EOI is disabled\n");
+
val |= VC_SBC_CONF_NO_UPD_PRF;
xive_regw(x, VC_SBC_CONFIG, val);
@@ -2790,7 +2798,7 @@ void xive_register_ipi_source(uint32_t base, uint32_t count, void *data,
assert(s);
/* Store EOI supported on DD2.0 */
- if (x->rev >= XIVE_REV_2)
+ if (XIVE_CAN_STORE_EOI(x))
flags |= XIVE_SRC_STORE_EOI;
/* Callbacks assume the MMIO base corresponds to the first
@@ -2898,7 +2906,7 @@ static struct xive *init_one_xive(struct dt_node *np)
/* Register built-in source controllers (aka IPIs) */
flags = XIVE_SRC_EOI_PAGE1 | XIVE_SRC_TRIGGER_PAGE;
- if (x->rev >= XIVE_REV_2)
+ if (XIVE_CAN_STORE_EOI(x))
flags |= XIVE_SRC_STORE_EOI;
__xive_register_source(x, &x->ipis, x->int_base,
x->int_hw_bot - x->int_base, IPI_ESB_SHIFT,
--
2.13.6
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