[Skiboot] [PATCH v2] plat/qemu: add PNOR support
stewart at linux.vnet.ibm.com
Tue Jun 19 15:42:21 AEST 2018
Cédric Le Goater <clg at kaod.org> writes:
> To access the PNOR, OPAL/skiboot drives the BMC SPI controller using
> the iLPC2AHB device of the BMC SuperIO controller and accesses the
> flash contents using the LPC FW address space on which the PNOR is
> The QEMU PowerNV machine now integrates such models (SuperIO
> controller, iLPC2AHB device) and also a pseudo Aspeed SoC AHB memory
> space populated with the SPI controller registers (same model as for
> ARM). The AHB window giving access to the contents of the BMC SPI
> controller flash modules is mapped on the LPC FW address space.
> The change should be compatible for machine without PNOR support.
Seems to pass the tests I have (which are limited)... so merged to
master as of 35cd7a379b935c74c184f4270c332b1ef85174a8
OPAL Architect, IBM.
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