[Skiboot] [PATCH 1/2] Revert "libpore: Fix incorrect mtspr instruction generation"

[Vaidyanathan Srinivasan]

* Stewart Smith <stewart at linux.vnet.ibm.com> [2018-01-25 10:28:45]:

> This reverts commit 65f9abea8e8cfd7f711a5c54217b5505826ff497.
> 
> Cc: stable
> Fixes: 65f9abea8e8cfd7f711a5c54217b5505826ff497.
> Signed-off-by: Stewart Smith <stewart at linux.vnet.ibm.com>

Missed fixes.  Need on all stable P9 branches.

Acked-by: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>

> ---
>  libpore/p9_stop_api.C | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/libpore/p9_stop_api.C b/libpore/p9_stop_api.C
> index cbbdfdd5de57..7242c423c652 100644
> --- a/libpore/p9_stop_api.C
> +++ b/libpore/p9_stop_api.C
> @@ -255,10 +255,12 @@ static uint32_t getOrisInstruction( const uint16_t i_Rs, const uint16_t i_Ra,
>   */
>  static uint32_t getMtsprInstruction( const uint16_t i_Rs, const uint16_t i_Spr )
>  {
> -    uint32_t mtsprInstOpcode = MTSPR_BASE_OPCODE;
> -    uint32_t temp = ((i_Spr & 0x1F) << 5) | ((i_Spr & 0x8F) >> 5);
> -
> -    mtsprInstOpcode |= ((i_Rs & 0x1F) << 21) | ((temp & 0x03FF) << 11);
> +    uint32_t mtsprInstOpcode = 0;
> +    uint32_t temp = (( i_Spr & 0x03FF ) << 11);
> +    mtsprInstOpcode = (uint8_t)i_Rs << 21;
> +    mtsprInstOpcode = ( temp  & 0x0000F800 ) << 5;
> +    mtsprInstOpcode |= ( temp & 0x001F0000 ) >> 5;
> +    mtsprInstOpcode |= MTSPR_BASE_OPCODE;
>  
>      return SWIZZLE_4_BYTE(mtsprInstOpcode);
>  }
> -- 
> 2.14.3
> 
> _______________________________________________
> Skiboot mailing list
> Skiboot at lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/skiboot