[Skiboot] [PATCH V2] fsp: Bail out of HIR if FSP is resetting voluntarily
Ananth N Mavinakayanahalli
ananth at linux.vnet.ibm.com
Thu Nov 30 23:19:42 AEDT 2017
a. Surveillance response times out and OPAL triggers a HIR
b. Before the HIR process kicks in, OPAL gets a PSI interrupt indicating link down
c. HIR process continues and OPAL tries to write to DRCR; PSI link inactive => xstop
OPAL should confirm that the FSP is not already in reset in the HIR path.
[V2] Handle the case where a second reset is triggered due to the two resets
happening in succession.
Signed-off-by: Ananth N Mavinakayanahalli <ananth at linux.vnet.ibm.com>
Tested-by: Pridhiviraj Paidipeddi <ppaidipe at linux.vnet.ibm.com>
---
hw/fsp/fsp.c | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/hw/fsp/fsp.c b/hw/fsp/fsp.c
index 4d173978..3d76d3c4 100644
--- a/hw/fsp/fsp.c
+++ b/hw/fsp/fsp.c
@@ -459,7 +459,16 @@ static bool fsp_crit_op_in_progress(struct fsp *fsp)
/* Notify the FSP that it will be reset soon by writing to the DRCR */
static void fsp_prep_for_reset(struct fsp *fsp)
{
- u32 drcr = fsp_rreg(fsp, FSP_DRCR_REG);
+ u32 drcr;
+
+ /*
+ * Its possible that the FSP went into reset by itself between the
+ * time the HIR is triggered and we get here. Check and bail out if so.
+ */
+ if (fsp_in_rr())
+ return;
+
+ drcr = fsp_rreg(fsp, FSP_DRCR_REG);
prlog(PR_TRACE, "FSP: Writing reset to DRCR\n");
drcr_last_print = drcr;
@@ -472,6 +481,9 @@ static void fsp_hir_poll(struct fsp *fsp, struct psi *psi)
{
u32 drcr;
+ if (fsp_in_reset(fsp) || !(psi_check_link_active(psi)))
+ return;
+
switch (fsp->state) {
case fsp_mbx_crit_op:
if (fsp_crit_op_in_progress(fsp)) {
@@ -1597,15 +1609,15 @@ static void __fsp_poll(bool interrupt)
}
iop = &fsp->iopath[fsp->active_iopath];
+ /* Check for error state and handle R&R completion */
+ fsp_handle_errors(fsp);
+
/* Handle host initiated resets */
if (fsp_in_hir(fsp)) {
fsp_hir_poll(fsp, iop->psi);
return;
}
- /* Check for error state and handle R&R completion */
- fsp_handle_errors(fsp);
-
/*
* The above might have triggered and R&R, check that we
* are still functional
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