[Skiboot] [PATCH 3/3] npu2: hw-procedures: Change phy_rx_clock_sel values
Alistair Popple
alistair at popple.id.au
Tue Nov 28 16:16:18 AEDT 2017
No idea what the magic values do, but the code looks pretty :-)
Acked-by: Alistair Popple <alistair at popple.id.au>
On Monday, 27 November 2017 6:10:54 PM AEDT Reza Arbab wrote:
> The clock selection bits we set here are inputs to a state machine.
>
> DL clock select (bits 30-31)
> 0b00: lane 0 clock
> 0b01: lane 7 clock
> 0b10: grid clock
> 0b11: invalid/noop
>
> To recover from a potential glitch, we need to ensure that the value we
> set forces a state change. Our current sequence is to set 0x3 followed
> by 0x1. With the above now known, that is actually a noop followed by
> selection of lane 7. Depending on lane reversal, that selection is not a
> state change for some bricks.
>
> The way to force a state change in all cases is to switch to the grid
> clock, and then back to a lane.
>
> Signed-off-by: Reza Arbab <arbab at linux.vnet.ibm.com>
> ---
> hw/npu2-hw-procedures.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c
> index 879ffe7..1318e86 100644
> --- a/hw/npu2-hw-procedures.c
> +++ b/hw/npu2-hw-procedures.c
> @@ -633,11 +633,11 @@ static uint32_t phy_rx_clock_sel(struct npu2_dev *ndev)
> *
> * Work around a known DL bug by doing these writes twice.
> */
> - npu2_write_mask_4b(ndev->npu, NPU2_NTL_DL_CLK_CTRL(ndev), 0x80000003, 0x80000003);
> - npu2_write_mask_4b(ndev->npu, NPU2_NTL_DL_CLK_CTRL(ndev), 0x80000003, 0x80000003);
> + npu2_write_mask_4b(ndev->npu, NPU2_NTL_DL_CLK_CTRL(ndev), 0x80000002, 0x80000003);
> + npu2_write_mask_4b(ndev->npu, NPU2_NTL_DL_CLK_CTRL(ndev), 0x80000002, 0x80000003);
>
> - npu2_write_mask_4b(ndev->npu, NPU2_NTL_DL_CLK_CTRL(ndev), 0x80000001, 0x80000003);
> - npu2_write_mask_4b(ndev->npu, NPU2_NTL_DL_CLK_CTRL(ndev), 0x80000001, 0x80000003);
> + npu2_write_mask_4b(ndev->npu, NPU2_NTL_DL_CLK_CTRL(ndev), 0x80000000, 0x80000003);
> + npu2_write_mask_4b(ndev->npu, NPU2_NTL_DL_CLK_CTRL(ndev), 0x80000000, 0x80000003);
>
> return PROCEDURE_NEXT;
> }
>
More information about the Skiboot
mailing list