[Skiboot] [PATCH] lpc: Clear pending IRQs at boot

[ppaidipe]

On 2017-11-27 10:19, Oliver O'Halloran wrote:
> When we come in from hostboot the LPC master has the bus reset 
> indicator
> set. This error isn't handled until the host kernel unmasks interrupts,
> at which point we get the following suprious error:
> 
> [   20.053560375,3] LPC: Got LPC reset on chip 0x0 !
> [   20.053564560,3] LPC[000]: Unknown LPC error Error address reg: 
> 0x00000000
> 
> Fix this by clearing the various error bits in the LPC status register
> before we initalise the skiboot LPC bus driver.
> 
> Signed-off-by: Oliver O'Halloran <oohall at gmail.com>
> ---
>  hw/lpc.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/hw/lpc.c b/hw/lpc.c
> index 663bffbcc18e..dbb2d4b211d4 100644
> --- a/hw/lpc.c
> +++ b/hw/lpc.c
> @@ -1176,6 +1176,10 @@ static void lpc_init_chip_p9(struct dt_node 
> *opb_node)
>  	/* Mask all interrupts for now */
>  	opb_write(lpc, lpc_reg_opb_base + LPC_HC_IRQMASK, 0, 4);
> 
> +	/* Clear any stale LPC bus errors */
> +	opb_write(lpc, lpc_reg_opb_base + LPC_HC_IRQSTAT,
> +		       LPC_HC_IRQ_BASE_IRQS, 4);
> +
>  	/* Default with routing to PSI SerIRQ 0, this will be updated
>  	 * later when interrupts are initialized.
>  	 */

Tested this patch on a SMC system, error messages goes away.

Tested-by : Pridhiviraj Paidipeddi <ppaidipe at linux.vnet.ibm.com>