[Skiboot] [PATCH 2/2] SCOM restore for DARN and XIVE

[Akshay Adiga]

On 11/16/2017 08:53 AM, Michael Neuling wrote:
> The subject needs to mention SLW/stop.
I will add that to the subject and  can send a v2 right away.
>
> Mikey
>
>
> On Thu, 2017-11-16 at 08:49 +0530, Akshay Adiga wrote:
>> While waking up from stop11, we want NCU_DARN_BAR to have enable bit set.
>> Without this stop_api call, the value restored is without enable bit set.
>> We loose NCU_SPEC_BAR when the quad goes into stop11, stop_api will
>> restore while waking up from stop11.
>>
>> Signed-off-by: Akshay Adiga <akshay.adiga at linux.vnet.ibm.com>
>> ---
>> Changes from initial posting
>> * Changed flag P9_STOP_SECTION_CORE_SCOM to P9_STOP_SECTION_EQ_SCOM
>>  for P9X_EX_NCU_DARN_BAR
>> * Added error handling
>>
>>  hw/nx.c   | 15 ++++++++++++++-
>>  hw/xive.c | 10 ++++++++++
>>  2 files changed, 24 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/nx.c b/hw/nx.c
>> index 64ac793..e130317 100644
>> --- a/hw/nx.c
>> +++ b/hw/nx.c
>> @@ -24,6 +24,7 @@
>>  #include <chip.h>
>>  #include <xscom-p9-regs.h>
>>  #include <phys-map.h>
>> +#include <p9_stop_api.H>
>>
>>  extern void nx_p9_rng_init(void);
>>
>> @@ -31,7 +32,7 @@ void nx_p9_rng_init(void)
>>  {
>>  	struct proc_chip *chip;
>>  	struct cpu_thread *c;
>> -	uint64_t bar, tmp;
>> +	uint64_t bar, tmp, rc;
>>
>>  	if (proc_gen != proc_gen_p9)
>>  		return;
>> @@ -65,6 +66,18 @@ void nx_p9_rng_init(void)
>>  						P9X_EX_NCU_DARN_BAR);
>>  			xscom_write(chip->id, addr,
>>  				    bar | P9X_EX_NCU_DARN_BAR_EN);
>> +			rc = p9_stop_save_scom((void *)chip->homer_base,
>> +					addr, bar | P9X_EX_NCU_DARN_BAR_EN,
>> +					P9_STOP_SCOM_REPLACE,
>> +					P9_STOP_SECTION_EQ_SCOM);
>> +			if (rc) {
>> +				prlog(PR_ERR,
>> +				"p9_stop_api for DARN_BAR failed rc= %lld",
>> +				 rc);
>> +				prlog(PR_ERR, "Disabling deep stop
>> states\n");
>> +				chip->wakeup_engine_error = true;
>> +			}
>> +
>>  		}
>>  	}
>>  }
>> diff --git a/hw/xive.c b/hw/xive.c
>> index df38074..14363b0 100644
>> --- a/hw/xive.c
>> +++ b/hw/xive.c
>> @@ -24,6 +24,7 @@
>>  #include <bitmap.h>
>>  #include <buddy.h>
>>  #include <phys-map.h>
>> +#include <p9_stop_api.H>
>>
>>  /* Use Block group mode to move chip_id into block .... */
>>  #define USE_BLOCK_GROUP_MODE
>> @@ -3136,6 +3137,7 @@ static void xive_configure_ex_special_bar(struct xive
>> *x, struct cpu_thread *c)
>>  {
>>  	uint64_t xa, val;
>>  	int64_t rc;
>> +	struct proc_chip *chip = get_chip(c->chip_id);
>>
>>  	xive_cpu_dbg(c, "Setting up special BAR\n");
>>  	xa = XSCOM_ADDR_P9_EX(pir_to_core_id(c->pir), P9X_EX_NCU_SPEC_BAR);
>> @@ -3148,6 +3150,14 @@ static void xive_configure_ex_special_bar(struct xive
>> *x, struct cpu_thread *c)
>>  		xive_cpu_err(c, "Failed to setup NCU_SPEC_BAR\n");
>>  		/* XXXX  what do do now ? */
>>  	}
>> +	rc = p9_stop_save_scom((void *)chip->homer_base, xa, val,
>> +				P9_STOP_SCOM_REPLACE,
>> P9_STOP_SECTION_EQ_SCOM);
>> +	if (rc) {
>> +		xive_cpu_err(c, "p9_stop_api failed for NCU_SPEC_BAR
>> rc=%lld\n",
>> +				rc);
>> +		xive_cpu_err(c, "Disabling deep idle states\n");
>> +		chip->wakeup_engine_error = true;
>> +	}
>>  }
>>
>>  static void xive_provision_cpu(struct xive_cpu_state *xs, struct cpu_thread
>> *c)