[Skiboot] [PATCH 0/4] Bug fix and coverity fixes

Cyril Bur cyril.bur at au1.ibm.com
Thu Nov 9 11:44:07 AEDT 2017

Every once in a while I open coverity and take a look. Usually its
harmless stuff, patches 2, 3 and 4 aren't urgent. Nothing seems
actually broken but coverity is correct and we might as well fix it.

Patch 1 actually contains a bug fix. Luckily there is no code path in
skiboot that can hit it today but this is only by luck. Lets fix it
before someone actually hits it, the headache that this bug would
cause will be never ending. Once again, thanks Coverity!

Cyril Bur (4):
  libpore: Fix incorrect mtspr instruction generation
  core/pcie-slots: Fix coverity possible NULL dereference
  npu2: Remove side effects in assert() calls.
  phb4: Use the return value of phb4_fenced() in phb4_get_diag_data()

 core/pcie-slot.c      |  5 +++--
 hw/npu2.c             | 10 +++++++---
 hw/phb4.c             |  5 +++--
 libpore/p9_stop_api.C | 10 ++++------
 4 files changed, 17 insertions(+), 13 deletions(-)


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