[Skiboot] [PATCH] hdata/cpu: account for p9 shared caches

Balbir Singh bsingharora at gmail.com
Fri Mar 10 01:27:58 AEDT 2017

On Thu, 2017-03-09 at 13:28 +1100, Oliver O'Halloran wrote:
> On P9 the L2 and L3 caches are shared between pairs of SMT=4 cores.
> Currently this is not accounted for when creating caches nodes in
> the device tree. This patch adds additional checking so that a
> cache node is only created for the first core in the pair and
> the second core will reference the cache correctly.

I also wonder if we should start calling these "next-level-cache"?

Acked-by: Balbir Singh <bsingharora at gmail.com

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