[Skiboot] [PATCH v4] phb4: Enable PCI peer-to-peer

Stewart Smith stewart at linux.vnet.ibm.com
Fri Aug 4 17:56:32 AEST 2017

Frederic Barrat <fbarrat at linux.vnet.ibm.com> writes:
> P9 supports PCI peer-to-peer: a PCI device can write directly to the
> mmio space of another PCI device. It completely by-passes the CPU.
> It requires some configuration on the PHBs involved:
> 1. on the initiating side, the address for the read/write operation is
> in the mmio space of the target, i.e. well outside the range normally
> allowed. So we disable range-checking on the TVT entry in bypass mode.
> 2. on the target side, we need to explicitly enable p2p by setting a
> bit in a configuration register. It has the side-effect of reserving
> an outbound (as seen from the CPU) store queue for p2p. Therefore we
> only enable p2p on the PHBs using it, as we don't want to waste the
> resource if we don't have to.
> P9 supports p2p mmio writes. Reads are currently only supported if the
> two devices are under the same PHB but that is expected to change in
> the future, and it raises questions about intermediate switches
> configuration, so we report an error for the time being.
> The patch adds a new OPAL call to allow the OS to declare a p2p
> (initiator, target) pair.
> Signed-off-by: Frederic Barrat <fbarrat at linux.vnet.ibm.com>

Thanks! Merged to master as of 700611a48025c5a556bb0aa011ac81bb5d1bcbc1.

Stewart Smith
OPAL Architect, IBM.

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