[Skiboot] [PATCH v3 07/10] npu2: Adjust content of the GENID BAR

[Reza Arbab]

Reflect the changed GENID BAR layout in POWER9 DD2.

Signed-off-by: Reza Arbab <arbab at linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>
Acked-by: Alistair Popple <alistair at popple.id.au>
Cc: Frederic Barrat <fbarrat at linux.vnet.ibm.com>
---
 hw/npu2.c           | 4 ++--
 include/npu2-regs.h | 5 +++--
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/hw/npu2.c b/hw/npu2.c
index 99790cd..595aec7 100644
--- a/hw/npu2.c
+++ b/hw/npu2.c
@@ -203,7 +203,7 @@ static void npu2_read_bar(struct npu2 *p, struct npu2_bar *bar)
 		bar->size = 0x20000;
 		break;
 	case NPU2_GENID_BAR:
-		bar->base = GETFIELD(NPU2_GENID_BAR_ADDR, val) << 17;
+		bar->base = GETFIELD(NPU2_GENID_BAR_ADDR, val) << 16;
 		enabled = GETFIELD(NPU2_GENID_BAR_ENABLE, val);
 		bar->size = 0x20000;
 		break;
@@ -236,7 +236,7 @@ static void npu2_write_bar(struct npu2 *p,
 		val = SETFIELD(NPU2_NTL_BAR_ENABLE, val, enable);
 		break;
 	case NPU2_GENID_BAR:
-		val = SETFIELD(NPU2_GENID_BAR_ADDR, 0ul, bar->base >> 17);
+		val = SETFIELD(NPU2_GENID_BAR_ADDR, 0ul, bar->base >> 16);
 		val = SETFIELD(NPU2_GENID_BAR_ENABLE, val, enable);
 		break;
 	default:
diff --git a/include/npu2-regs.h b/include/npu2-regs.h
index fb85729..a10f74f 100644
--- a/include/npu2-regs.h
+++ b/include/npu2-regs.h
@@ -122,8 +122,9 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask);
 #define   NPU2_GENID_BAR_ENABLE			PPC_BIT(0)
 #define   NPU2_GENID_BAR_GROUP			PPC_BITMASK(3,6)
 #define   NPU2_GENID_BAR_CHIP			PPC_BITMASK(7,9)
-#define   NPU2_GENID_BAR_NODE_ADDR		PPC_BITMASK(10,34)
-#define   NPU2_GENID_BAR_ADDR			PPC_BITMASK(3,34)
+#define   NPU2_GENID_BAR_NODE_ADDR		PPC_BITMASK(10,35)
+#define   NPU2_GENID_BAR_ADDR			PPC_BITMASK(3,35)
+#define   NPU2_GENID_BAR_POISON			PPC_BIT(39)
 #define NPU2_LOW_WATER_MARKS			0x040
 #define NPU2_HIGH_WATER_MARKS			0x048
 #define NPU2_RELAXED_ORDERING_CFG0		0x050
-- 
1.8.3.1