[Skiboot] [PATCH v9 09/11] skiboot: Add opal call to enable/disable Nest IMC

[Anju T Sudhakar]

Add new opal calls to start, stop the Nest IMC microcode running in the
OCC complex. Also, check the status from the control block structure before
starting/stopping the IMC microcode.

This patch also add an opal call to init the counters, that will be used in
the following patch.

Signed-off-by: Hemant Kumar <hemant at linux.vnet.ibm.com>
[maddy: fixed the opal call number]

Signed-off-by: Madhavan Srinivasan <maddy at linux.vnet.ibm.com>
Signed-off-by: Anju T Sudhakar <anju at linux.vnet.ibm.com>
---
 hw/imc.c           | 77 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/opal-api.h | 11 +++++++-
 2 files changed, 87 insertions(+), 1 deletion(-)

diff --git a/hw/imc.c b/hw/imc.c
index ad54479..6a1982e 100644
--- a/hw/imc.c
+++ b/hw/imc.c
@@ -293,3 +293,80 @@ err:
 	prerror("IMC Devices not added\n");
 	free(buf);
 }
+
+/*
+ * opal_imc_counters_init : This call initialize the IMC engine.
+ *
+ * This call is not being used in case of NEST IMC.
+ * Additional arguments will be added to this call in the following patch.
+ */
+static int64_t opal_imc_counters_init(uint32_t type)
+{
+	if (type == OPAL_IMC_COUNTERS_NEST)
+		prerror("IMC: unknown operation for nest imc\n");
+	return OPAL_PARAMETER;
+}
+opal_call(OPAL_IMC_COUNTERS_INIT, opal_imc_counters_init, 1);
+
+/* opal_imc_counters_control_start: This call starts the nest imc engine. */
+static int64_t opal_imc_counters_start(uint32_t type)
+{
+	u64 op, status;
+	struct imc_chip_cb *cb;
+	int ret = OPAL_PARAMETER;
+
+	switch (type) {
+	case OPAL_IMC_COUNTERS_NEST: 
+		/* Fetch the IMC control block structure */
+		cb = get_imc_cb();
+		status = be64_to_cpu(cb->imc_chip_run_status);
+
+		/* Check whether the engine is already running */
+		if (status == NEST_IMC_RUNNING)
+			return OPAL_SUCCESS;
+		op = NEST_IMC_ENABLE;
+
+		/* Write the command to the control block now */
+		cb->imc_chip_command = op;
+
+		return OPAL_SUCCESS;
+		break;
+	default:
+		prerror("IMC: unknown domain \n");
+		return ret;
+	}
+	return ret;
+}
+opal_call(OPAL_IMC_COUNTERS_START, opal_imc_counters_start, 1);
+
+/* opal_imc_counters_control_stop: This call stops the nest imc engine. */
+static int64_t opal_imc_counters_stop(uint32_t type)
+{
+	u64 op, status;
+	struct imc_chip_cb *cb;
+	int ret = OPAL_PARAMETER;
+
+	switch (type) {
+	case OPAL_IMC_COUNTERS_NEST: 
+		/* Fetch the IMC control block structure */
+		cb = get_imc_cb();
+		status = be64_to_cpu(cb->imc_chip_run_status);
+
+		/* Check whether the engine is already stopped */
+		if (status == NEST_IMC_PAUSE)
+			return OPAL_SUCCESS;
+
+		op = NEST_IMC_DISABLE;
+
+		/* Write the command to the control block now */
+		cb->imc_chip_command = op;
+
+		return OPAL_SUCCESS;
+		break;
+	default:
+		prerror("IMC: unknown domain \n");
+		return ret;	
+	}
+	return ret;
+}
+opal_call(OPAL_IMC_COUNTERS_STOP, opal_imc_counters_stop, 1);
diff --git a/include/opal-api.h b/include/opal-api.h
index 7966200..14477c3 100644
--- a/include/opal-api.h
+++ b/include/opal-api.h
@@ -204,7 +204,10 @@
 #define OPAL_NPU_INIT_CONTEXT			146
 #define OPAL_NPU_DESTROY_CONTEXT		147
 #define OPAL_NPU_MAP_LPAR			148
-#define OPAL_LAST				148
+#define OPAL_IMC_COUNTERS_INIT			149
+#define OPAL_IMC_COUNTERS_START			150
+#define OPAL_IMC_COUNTERS_STOP			151
+#define OPAL_LAST				151
 
 /* Device tree flags */
 
@@ -1148,6 +1151,12 @@ enum {
 	XIVE_DUMP_EMU_STATE	= 5,
 };
 
+/* Operation argument to IMC Microcode */
+enum {
+	OPAL_IMC_COUNTERS_NEST = 1,
+};
+
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* __OPAL_API_H */
-- 
2.7.4