[Skiboot] [PATCH skiboot] npu: Implement FLR
Alexey Kardashevskiy
aik at ozlabs.ru
Thu Apr 6 19:41:42 AEST 2017
As the comment in npu_dev_populate_pcie_cap() says,
"We should support FLR" and the NPU device advertises its
support. However, when the kernel issues FLR, skiboot does
nothing which leaves NPU in a state which does not allow
to use NV links again after GPU was reset.
This adds basic handling of FLR (function level reset).
Signed-off-by: Alexey Kardashevskiy <aik at ozlabs.ru>
---
With this fix, the bandwidthTest reports PINNED Memory Transfers
>= 20000MB/s, without it only first guest boot reports this much
of bandwidth, all consequent guests only report 6000MB/s maximum.
---
hw/npu.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/hw/npu.c b/hw/npu.c
index 302a5518..6a535885 100644
--- a/hw/npu.c
+++ b/hw/npu.c
@@ -271,6 +271,26 @@ static int64_t npu_dev_cfg_bar(void *dev, struct pci_cfg_reg_filter *pcrf,
return npu_dev_cfg_bar_read(ndev, pcrf, offset, len, data);
}
+static int64_t npu_dev_cfg_exp_devcap(void *dev,
+ struct pci_cfg_reg_filter *pcrf __unused,
+ uint32_t offset __unused, uint32_t size __unused,
+ uint32_t *data, bool write)
+{
+ struct pci_virt_device *pvd = dev;
+ struct npu_dev *ndev = pvd->data;
+
+ assert(write);
+
+ if (*data & PCICAP_EXP_DEVCTL_FUNC_RESET) { /* PCI_EXP_DEVCTL_BCR_FLR */
+ ndev->procedure_status = 0;
+ ndev->procedure_number = 0;
+ ndev->procedure_step = 0;
+ ndev->procedure_data = 0;
+ }
+
+ return OPAL_PARTIAL;
+}
+
static struct npu_dev *bdfn_to_npu_dev(struct npu *p, uint32_t bdfn)
{
struct pci_virt_device *pvd;
@@ -1198,6 +1218,10 @@ static void npu_dev_populate_pcie_cap(struct npu_dev_cap *cap)
(PCICAP_EXP_DEVCAP_FUNC_RESET));
PCI_VIRT_CFG_INIT_RO(pvd, base + PCICAP_EXP_DEVCAP, 4, val);
+ pci_virt_add_filter(pvd, base + PCICAP_EXP_DEVCTL, 2,
+ PCI_REG_FLAG_WRITE,
+ npu_dev_cfg_exp_devcap, NULL);
+
/* 0x08 - Device control and status */
PCI_VIRT_CFG_INIT(pvd, base + PCICAP_EXP_DEVCTL, 4, 0x00002810,
0xffff0000, 0x000f0000);
--
2.11.0
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