[Skiboot] [PATCH V2 6/6] phb3: Test CAPI mode on both CAPP units on Naples

[Philippe Bergheaud]

Naples has two capp units. The address of the PE Secure CAPP Enable
register for capp unit 1 is equal to the address for capp unit 0 + 0x40.
This patch introduces and uses the macro PE_REG_OFFSET, that returns
0x40 for the capp unit 1 on Naples, and 0x0 otherwise.

Signed-off-by: Philippe Bergheaud <felix at linux.vnet.ibm.com>
---
V2: new patch added to the series

 hw/phb3.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/hw/phb3.c b/hw/phb3.c
index 4965701..45883ab 100644
--- a/hw/phb3.c
+++ b/hw/phb3.c
@@ -3368,6 +3368,11 @@ static void phb3_init_capp_errors(struct phb3 *p)
 	out_be64(p->regs + PHB_INB_ERR_AIB_FENCE_ENABLE,   0xfcffe0fbff7ff0ec);
 }
 
+#define PE_CAPP_EN 0x9013c03
+
+#define PE_REG_OFFSET(p) \
+	((p->rev == PHB3_REV_NAPLES_DD10 && p->index) ? 0x40 : 0x0)
+
 static int64_t phb3_set_capi_mode(struct phb *phb, uint64_t mode,
 				  uint64_t pe_number)
 {
@@ -3435,7 +3440,7 @@ static int64_t phb3_set_capi_mode(struct phb *phb, uint64_t mode,
 	if (mode != OPAL_PHB_CAPI_MODE_CAPI)
 		return OPAL_UNSUPPORTED;
 
-	xscom_read(p->chip_id, 0x9013c03, &reg);
+	xscom_read(p->chip_id, PE_CAPP_EN + PE_REG_OFFSET(p), &reg);
 	if (reg & PPC_BIT(0)) {
 		PHBDBG(p, "Already in CAPP mode\n");
 	}
-- 
2.1.0