[Skiboot] [PATCH 1/2] hw/phb3: Fix potential race in EOI

Stewart Smith stewart at linux.vnet.ibm.com
Wed Apr 27 07:59:48 AEST 2016

Michael Neuling <mikey at neuling.org> writes:
> When we EOI we need to clear the present (P) bit in the Interrupt
> Vector Cache (IVC).  We must clear P ensuring that any additional
> interrupts that come in aren't lost while also maintaining coherency
> with the Interrupt Vector Table (IVT).
> To do this, the hardware provides a conditional update bit in the
> IVC. This bit ensures that generation counts between the IVT and the
> IVC updates are synchronised.
> Unfortunately we never set this the bit to conditionally update the P
> bit in the IVC based on the generation count.  Also, we didn't set
> what we wanted the new generation count to be if the update was
> successful.
> This patch fixes sets both of these.  It also reworks and documents
> the code so that mortals may eventually be able to understand this
> process.
> Signed-off-by: Michael Neuling <mikey at neuling.org>
> ---
>  hw/phb3.c | 34 +++++++++++++++++++++++++++++-----
>  1 file changed, 29 insertions(+), 5 deletions(-)

Thanks to everybody who solidly tested this patch series.

Now merged to 5.1.x as of c8bea6e01608f77550ef686bb7359094311de810
merged to 5.2.x as of d729ddbfd8cb7b5dc60f336bf7208214c96a3233
and master as of 2fd158b58a8a38a07cde5f0ac354bd127823a0c9

Stewart Smith
OPAL Architect, IBM.

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