[Skiboot] [PATCH 1/2] hw/phb3: Fix potential race in EOI

Andrew Donnellan andrew.donnellan at au1.ibm.com
Tue Apr 26 09:55:29 AEST 2016

On 11/02/16 15:25, Michael Neuling wrote:
> When we EOI we need to clear the present (P) bit in the Interrupt
> Vector Cache (IVC).  We must clear P ensuring that any additional
> interrupts that come in aren't lost while also maintaining coherency
> with the Interrupt Vector Table (IVT).
> To do this, the hardware provides a conditional update bit in the
> IVC. This bit ensures that generation counts between the IVT and the
> IVC updates are synchronised.
> Unfortunately we never set this the bit to conditionally update the P
> bit in the IVC based on the generation count.  Also, we didn't set
> what we wanted the new generation count to be if the update was
> successful.
> This patch fixes sets both of these.  It also reworks and documents
> the code so that mortals may eventually be able to understand this
> process.
> Signed-off-by: Michael Neuling <mikey at neuling.org>

Tested with an IBM internal CAPI accelerator that hit this issue.

Tested-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>

Andrew Donnellan              OzLabs, ADL Canberra
andrew.donnellan at au1.ibm.com  IBM Australia Limited

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