[Skiboot] [PATCH v2] PHB3: Add M64 BAR count as a device node property
weiyang at linux.vnet.ibm.com
Mon Oct 26 19:56:12 AEDT 2015
On Mon, Oct 26, 2015 at 03:05:49PM +1100, Gavin Shan wrote:
>On Mon, Oct 26, 2015 at 02:36:53PM +1100, Stewart Smith wrote:
>>Wei Yang <weiyang at linux.vnet.ibm.com> writes:
>>> PHB3 has 16 M64 BARs, which will be used in host to map 64bit MMIO range.
>>> This is more reasonable for host to retrieve this value than just use a
>>> hard coded value.
>>> This patch adds this property in device node, so that host could get it
>>> from platform.
>>> Signed-off-by: Wei Yang <weiyang at linux.vnet.ibm.com>
>>As mentioned on IRC:
>>- I think this needs to be documented in doc/device-tree that if
>> property doesn't exist, assume 16.
>> (yes, PCI binding documentation is kind of sparse, not even a pointer
>> to anywhere where it may be documented)
>>- would be good to have ack from gavin or benh on this.
>Exactly, the newly added properties are worthy to be documented well.
>I agree it's a good idea to hide HW implementation in skiboot, but I
>don't think this patch is complete from itself.
>- P7IOC needs similar thing.
>- More HW limitations would be exposed: single/shared modes, number of
> segments each M64 BAR can supports and total segment count. All those
> information is worthy to be carried in extendible way.
What do you mean for the single/shared mode property?
What is the total segment count? This is the sum of each M64 BAR segments?
>IO and M32 BAR has similar issues to be addressed.
Looks from now, we only have one IO/M32 BAR on those platforms. I don't see a
strong reason to add those property for them. Do I miss something?
I believe you are more familiar with hardware and skiboot. If you would like
to fix these issues, I would be appreciated. I am fine to give this patch to
Help you, Help me
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