[Skiboot] [PATCH 0/6] Add Nvlink support

[Stewart Smith]

Alistair Popple <alistair at popple.id.au> writes:
> NV-Link is a high speed interconnect that is used in conjunction with
> a PCI-E connection to create an interface between CPU and GPU that
> provides very high data bandwidth. A PCI-E connection to a GPU is used
> as the control path to initiate and report status of large data
> transfers sent via the NV-Link.
>
> On IBM Power systems the NV-Link hardware is similar to our standard
> PCI IODA2/PHB3. To maximise code reuse skiboot exposes each NV-Link as
> a PCIe device by emulating the standard PCIe configuration space in
> software. Only the GPU can initiate data transfers.
>
> This patch series adds support for exposing the NPU as a set of PCIe
> devices and a new PHB type. It provides functions for setting up the
> IODA2 tables for data transfers and address translation in addition to
> link training procedures which are called by drivers running on the
> host.
>
> At this stage EEH is not supported beyond printing a console message.
>
> Alistair Popple (4):
>   include/bitutils.h: Add macros for 16-bit constants
>   include/pci-cfg.h: Add PCI vendor specific capability definitions
>   Nvlink: Add NPU PHB functions
>   Garrison: Add Nvlink device tree bindings
>
> Gavin Shan (2):
>   PCI: Cache PCI device IDs
>   PCI: Trace device node from PCI device
>
>  core/init.c                 |    3 +
>  core/pci.c                  |   12 +-
>  hw/Makefile.inc             |    2 +-
>  hw/npu-hw-procedures.c      |  598 +++++++++++++++
>  hw/npu.c                    | 1718 +++++++++++++++++++++++++++++++++++++++++++
>  include/bitutils.h          |    3 +
>  include/npu-regs.h          |  235 ++++++
>  include/npu.h               |  211 ++++++
>  include/pci-cfg.h           |   13 +
>  include/pci.h               |   14 +-
>  include/skiboot.h           |    2 +-
>  platforms/astbmc/garrison.c |   61 ++
>  12 files changed, 2866 insertions(+), 6 deletions(-)
>  create mode 100644 hw/npu-hw-procedures.c
>  create mode 100644 hw/npu.c
>  create mode 100644 include/npu-regs.h
>  create mode 100644 include/npu.h

Thanks, merged as of 5a76659 Garrison: Add Nvlink device tree bindings


What'd be great is if the device tree bindings were documented
somewhere, say in doc/device-tree/ at least?